Nor Flash Forum Discussions
How to use safeboot cmds all register values are either FF or 00
Hi,
We have the S25FL064LABNFI010 in one of our designs, and cannot program it (previously this was done by the CEM, but they "forgot" for this batch...)
I'm attempting to use an FTDI C232HM-DDHSL-0 cable onto our board (connecting /CS, CLK, IO_0, IO_1 and GND), and the linux flashrom software to write in the supplied (and proven) .bin file. This is a copy of the setup they have, so it 'should' be possible.
I think that we may not be calling the flashrom program with the correct parameters, but (as always with linux) things don't ever actually work and the user is left to guess why not.
Has anyone used this combination and can help me work out the right settings please?
Thanks,
Colin
Show LessHi,
We are using S29GL064S NOR FLASH of Model 03. We are using 16 bit address mode. As per datasheet, Block 127 to 134 are 8K/4K. I wanted to erase, read and write the this 8/4K blocks. Read and write operation are working fine in this block. But when i give erase command, its erasing complete 127 to 134 block instead of erasing only 127th Block.
Can you help me is this the expected behavior or missing something?
Thanks in advance.
Show LessHi,
I am working on S25Fl064L Flash Memory.
I Could read Device ID, Manufacture ID, Default Configuration Status Register values and it is matching according to data sheet values.
However, I could not write the data, and after debugging I came to know that WEL bit is not being set in Status Register 1 Volatile (SR1V).
Following thing I have done:
1) Read Status Register 1 Volatile (SR1V) value (using command 0x05), Output was 0x00 which was default value.
2) WREN command (0x06) is sent (Which is required to write the data to Nonvolatile memory)
3) Now again Read Status Register 1 value, Output was again 0x00, which should be 0x02. (WEL bit is still '0' only)
Please help, where I am wrong.
Best Regards,
Ethan Hunt.
Show LessI need to use the S25FL064L connect to STM32F446 microprocessor.
I'm starting to use for the first time thi smemory
This is my inizial example sequence:
------ ERASING -------
1) 0x06 WREN
2) 0x05 Check RDSR1
3) 0xD8 0x00 0x00 0x00 Block Erase
4) 0x05 Check RDSR1 waiting ready
------ WRITING -----
5) 0x06 WREN
6) 0x05 Check RDSR1
7) 0x32 Page Program (I have doubt if it is correct)
😎 0x05 Check RDSR1(immediately free after precedente command)
---- READING -----
what commands should i use to activate the memory mapped system
I enclose an image of the writing commands ad address 00 value 2A .
There is a command example sequence for erase/write/read the memory ?
Thanks all
Show Less
Hi,
we are using S25FL256L QSPI flash with intel Cyclone V E fpga, we have written a script for FLash programming via JTAG mode from Quartus programmer. Our Read ID, auto detect as QSPI256mb flash , blank check process is successfully completing but failing in Program stage.
Programming fails at around 33% programming done, below is the error we get
"Error (20064): Error status: Read status 2 register returned 0xFF is mismatch with the expected data (0x00) Error (19117): Programming failed on flash 1 at address 0x00BB0100 Error (209012): Operation failed"
when we read status 1 register(0x05) and status 2 register (0x07) we are getting value returned as 0XFF at address 0x00BB0100 . we are using 0x12 command for 4byte addressing mode page write. for address previous to 0x00BB0100 is ok we are not getting error ,as we added read status 1 register(0x05) and status 2 register (0x07) for it.
can you please suggest us , what can be probable reason for that error.
thanks,
Snehal B.
Show LessWhat is process to program S25FL256L QSPI flash for Intel Altera Cyclone V E FPGA?
We are NOT able to program S25FL256L using Intel’s Quartus Programmer.
The error is Silicon ID not detected for device 1.
This may be similar to a post that has NOT been resolved
- “Cypress Flash Programming using Nios II - Not working” @ https://community.infineon.com/t5/Nor-Flash/Cypress-Flash-Programming-using-Nios-II-Not-working/td-p/78031
There are two similar posts that have been solved, which aren’t the exact issue:
- S25FL128L Cyclone V Configuration @ https://community.infineon.com/t5/Nor-Flash/S25FL128L-Cyclone-V-Configuration/td-p/361155 <-- This discussion references Application Note AN200498, which I was NOT able to find.
- S25FL256S and Quartus @ https://community.infineon.com/t5/Nor-Flash/S25FL256S-and-Quartus/td-p/117569 <-- This is an older issue from 2018, likely using Quartus Prime 17.0 as it references AN98558. The specific solution here was “to write a wrapper around the QSYS module that forced the PLL reset to always be ‘0’.” If the current version of Quartus still needs a wrapper, is this something Infineon can provide? Or should I be asking Intel?
Greg
Show LessFor Writing into the multiple memory locations in an loop
iam giving commands
write enable 50---> write command 01 in which i'am writing into STR 1 ,cfgr1,2,3,4---->in for loop{ write memory (02) followed by starting address and data }
Is this sequence correct? i'am able to write only at one memory location after that if is not accepting when iam trying to read i got to Know it is not programmed , only starting memory location is programmed.
what is the issue ? despite of giving enough latencies after each write still its not taking
Show LessWe are aware that there is no such information, but we would like to check just to be sure.
Hi,
Is it possible to do Progam Flash array using QPI DDR in S25HS01GT memory model?
Because im seeing in the S25HS01GT Data sheet which does not mention any program command for program Flash array using write QPI DDR. Its mentioned command "ED "only for Read QPI DDR .
Kindly provide the information.
Thanks,
Suresh Muthuraj
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