Nor Flash Forum Discussions
Q)シリアルフラッシュメモリ(S25FL064P)を使用しておりましたが、
販売終了となってしまったため、その代替品を教えて頂けませんでしょうか。
We were using serial flash (S25FL064P), but because it becomes obsolete, would you please tell me the drop-in replacement part for this?
Show Less- Hi, I’m using S29GL01GS parallel Nor Flash, the issue that I’m facing is that I am not able to write the complete 1Gbit , I'm able to write only 512Mbit ,the address mapping is from 0x0000000 to 0x3FFFFFF which is only 512Mbit,datasheet specifies it is 16bit word addressing but the chip takes two address spaces for a 16bit word. How do I access the rest of the Memory?.
- After the Complete Chip Erase Command Sequence, I usually wait around 3 minutes before writing to or reading from the chip, Is this normal?
is it possible to use cypress S25FL128LAG with cyclone V GT and program it with NIOS.(using flash memory controller).
I have the issue of Device ID check while programming with JIC mode.
Show LessI am using S25FL512SAGMFI013 in my design. By default this device comes in 3 byte mode. How can I set to 4 byte mode. In the datasheet, it is telling to set EXTADR bit for enabling 4 byte mode. But this is a volatile bit. Is there any other way to set the mode?
Show LessI need the way to keep software in common in preparation for future development SPI.
Please give me advice how to prepare.
I strongly feel the need, because S25FL-T ’s development seems to be just prepared on Cypress roadmap.
http://www.cypress.com/product-roadmaps/cypress-flash-memory-roadmap
Some command definitions is different for each SPI product.
I think that the behavior of Erase command(D8h) is most important.
(S25FL064L) D8h means 64kB sector erase.
(S25FL256L) D8h means 64kB sector erase.
(S25FL512S) D8h means 256kB sector erase.
(S25FL512T) What does D8h mean? 64kB or 256kB?
The system should be prepared as follows;
- Equip with both 64 kB and 256 kB sub-routines.
- Identify which type of SPI is mounted on the board.
- Choice appropriate sub-routine, according to the identified
Please give me advice how to identify which type of SPI is mounted on the board.
I feel that SFDP parameter is useful for this case. Please confirm it.
Or, if you have other easier ways, please let me know.
(Previous conversation)
https://community.cypress.com/thread/31423
>> There is no special/specific reason.
I understand that the Device ID definition have no rules, but that's why I believe the ID should not be used to identify future products.
Best regards
Show LessHi,
I am failing to erase 4K sector (cmd: 0x21) at address Flash Address 0x10000 then write (cmd: 0x12) to that same sector. Flash configured such that 4k sectors start at low addresses. I can, however, perform a 64K erase (cmd: 0xdc) at 0x10000 then write sucessfully.
I do need to be able to make use of 4K sectors. Any guidance would be appreciated
Thanks
Show LessWhat kind of environment is the worst in using flash memory?
Hi team,
The arguments of slld_WRRCmd / slld_WRROp functions do not fit both S25FL-L and S25FL-S families.
Do you have the plan to modify them?
SLLD_STATUS slld_WRRCmd
(
BYTE *status_val, /* variable containing data to program the status register */
BYTE *config_val, /* variable containing data to program the config register */
BYTE *status2_val /* variable containing data to program the status register2 */
);
SLLD_STATUS slld_WRROp
(
BYTE *status_val, /* variable containing data to program the status register */
BYTE *config_val, /* variable containing data to program the config register */
BYTE *status2_val, /* variable containing data to program the status register2 */
DEVSTATUS *dev_status_ptr /* variable to store device status */
);
in case of S25FL-S
Write Registers (WRR 01h): Write Register (Status-1, Configuration-1)
in case of S25FL-L
Write Registers (WRR 01h): Write Register (Status-1 and Configuration-1,2,3)
Thanks and regards.
Show LessI want to use the S70FL01GS,Can you provide code to me about how use the S70FL01GS?
Thank you.
Q1: WP # terminal
If Quad command or Write protection is not used in the host system, the WP# pin can be left open, but is there a problem with using the WP# pin fixed at VDD (3.3 V)?
Q2: RESET # terminal
If Quad command or Reset is not used in the host system, the RESET# pin can be left open, but is there a problem with using the RESET# pin fixed at VDD (3.3 V)?
Show Less