Nor Flash Forum Discussions
We are giving Vid= 12V on reset pin of S29JL032J to make it unprotected mode for programming.
Did Vid=12V really required for programming or can I keep always 3.3VShow Less
We’re using S25FL128SAGMFV000 NOR flash memory in our "ECM" application. The ECM is not powering-up and after investigation and analysis we found that the NOR flash memory corruption CR1 “configuration registers” and OTP 0 bits. Any idea what could be the cause of this failure?
Here is the memory readout data:
Thanks a lotShow Less
About All Cypress product series, do you have a assembly site & Test site information？
SPI NOR Flash memory
Test site: Thailand
A'ssy sire：JapanShow Less
We are using S25FL128S as configuration flash for Artix 7 FPGA. The same was suggested by Xilinx.
Kindly confirm whether we can use S25FL128L instead of S25FL128S flash.
Reply me if there is any mismatch in instruction set, voltage levels,...etc
Kindly confirm if special care to be taken during configuration.
We are using S25FL064LABMFV013 in one of our design. The same is used as configuration flash (QIO Mode) for Spartan - 6 FPGA XC6SLX9-2TQG144I.
But the flash S25FL064LABMFV013 is not available with vendors. As per Xilinx, S25FL129P is also supported by FPGA.
As per cypress S25FL129P is NRND and they suggested to use S25FL128L Part.
Kindly confirm that we can use S25FL128L instead of S25FL064 and there is no mismatch in instruction set.
Kindly reply at the earliest.Show Less
Could your provide Data Sheet in Japanese available?
On Cpress HP, There is an English version only as below.
Thank you for your help.Show Less
I would like to know the internal pull-up resistor on RESET# and WP# for the S25FS512S and S70FS01GS (1.8V) family.
Previous your answer of KBA218745, I know it was made "pull-up leakage " circuit for FL-S (3V) family.
Is it same for the internal circuit of FS-S family?
What is the leakage current in the pull-up leakage circuit of S25FS512S and S70FS01GS (1.8v) family?
Thank you & Regards,Show Less
According to the S29JL-J data sheet,
Programming from 0 to 1 states that the bank is set to DQ5 = 1 or that the DQ7 and DQ6 status bits indicate that the operation was successful.
Why are there two different states?
What is the condition for DQ5 = 1?
Naoaki MorimotoShow Less
For an ongoing production, I'm trying to source the S25FL512SAGMFI010 NOR FLASH but it's very hard to find stock.
I can't figure in the datasheet if the DDR version of the same product can be used in single data rate applications (standard 4 wire SPI). The part number in which I'm interested is the following: S25FL512SDPMFIG11.
Thanks in advance!!