Semper Flash with Octal Interface S28HS256T: LSb of address in Octal DDR transactions

[MoSa_4200611]

Hello,

It is mentioned in the specification that "The LSb of the address always be zero in any Octal DDR transactions with the address input."

1) Does this apply to any read or write transaction?

2) How can this work for WRARG (Write Any Register) where such commands are meant to access one register location (one byte) only. It is clearly mentioned in the specification that : "The Write Any Register (WRARG_C_1 / WRARG_4_1) transaction provides a way to write any device register, nonvolatile or volatile.

The transaction includes the address of the register to be written, followed by one byte of data to write in the addressed register (see

Section 6. Transaction Table)."

Then, how can odd addressed registers be written? For instance, CR2 (at address 0x00800003)

[AlbertB_56]

Hello,

Thank you for contacting Cypress Semiconductor

We are currently reviewing your query and we will respond

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Thank you for your patience...

Best regards,

Albert
Cypress Semiconductor Corp.

An Infineon Technologies Company

[AlbertB_56 · Accepted solution]

Hello,

Thank you for your patience...

The statement, "The LSb of the address always be zero in any Octal DDR transactions with the address input"  does not apply to any

READ or WRITE transactions, nor does this statement apply to the Write Any Register (WRARG) command.

For register write, provide the same register address as mentioned in the datasheet, as it it not needed to put A0=0 for register access

This comment is also true for memory array read/write operations.

Hope this helps...

Best regards,

Albert

Cypress Semiconductor Corp.

An Infineon Technologies Company