SEMPER FLASH S25HL512T

[Shraddha]

Iam successfully able to enable the configuration register1 ,  1st bit by writing 02 ,

To enable the 6th bit for configuration register 2 , by default its value is 08 ,i am writing 48 to enable the 6th bit but its not accepting , its going to FFFFF mode

what is the reason? what data should i enter?

[AlbertB_56]

Hello Shraddha,

Thank you for contacting Infineon Technologies.

It appears you have set the data width of the S25HL512T to QUAD (4-4-4) mode (CFR1[1] = 1)

Assuming the S25HL512T is in QUAD (4-4-4) mode, before sending any command to the flash, you must first send the Write Enable command (Transaction name: WRENB_0_0 / command: 06h).  This will automatically set the Write Enable Latch (WEL) = 1.  The WRENB_0_0 is followed by the Write Any Register command (Transaction name: WRARG_C_1 / Command: 71h.

You should be able to program Config. Register-2 to 48 (CFR2[6] = 1), to set the Interface and protocol selection I/O width to QUAD (4-4-4) mode.

Best regards,

Albert

Cypress Semiconductor Corp.

AN Infineon Technologies Company

[Shraddha · Accepted solution]

hello ,

 I had implemented the QSPI, the problem which I'm facing is that 

1)  to read the device id , configuration register 1 and 2 both through spi , first I tried to read the configuration register 2 i.e.  in 1s-1s-1s and then it was showing 08 by default value , that was working well 

2) after that i tried to write on the memory 0x00800003 then after that it got converted to  (4s-4s-4s) format 

3)when I'm trying to read the cfgr 2 in  4s-4s-4s  it not accepting the command which i had used 

Read Mode:- CS(high)--->CS(low)--->cmd(65)--->address(0x00800003)---->read cycles

Write Mode:- CS(High)--->CS(low)---->cmd(06)--->cmd(71)--->cmd(0x00800003)--->cmd(68)

Read Mode:- CS(High)---->CS(low)----> cmd(65)--->cmd(0x00800003)--->read cycles

its not working let me know where I'am going wrong output wave form i have attached