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Hello, I want to use the S29GL512T through SM32F7 and I can't program/erase. In prior’s designs, the board had the memory S29GL128N and now I want to use the new S29GL512T without change the board design.
Thus, the first question is, can I issue the S29GL512T as 128Mbits memory keeping the A23 and A24 pins to no connect? Or is there any other inconvenient?
Then if there is no problem to use S29GL512T, I’ve developing an external loader to program the memory and, as I said, the program/erase doesn't work. I'm not sure what happens, but I suspect the sequence isn't sent successfully because the RD/BY# pin never detects the falling edge. Can you help me and suggest things to check for the program/erase process works?
This is the code for MassErase
int MassErase(void) {
uint8_t mass_erase = 0;
unsigned long polling_counter = 0xFFFFFFFF;
volatile uint16_t status_reg;
NOR_WRITE(NOR_ADDR_SHIFT(BSP_NOR_BASE_ADDR, NOR_MEMORY_16B, 0x555), 0xAA);
NOR_WRITE(NOR_ADDR_SHIFT(BSP_NOR_BASE_ADDR, NOR_MEMORY_16B, 0x2AA), 0x55);
NOR_WRITE(NOR_ADDR_SHIFT(BSP_NOR_BASE_ADDR, NOR_MEMORY_16B, 0x555), 0x80);
NOR_WRITE(NOR_ADDR_SHIFT(BSP_NOR_BASE_ADDR, NOR_MEMORY_16B, 0x555), 0xAA);
NOR_WRITE(NOR_ADDR_SHIFT(BSP_NOR_BASE_ADDR, NOR_MEMORY_16B, 0x2AA), 0x55);
NOR_WRITE(NOR_ADDR_SHIFT(BSP_NOR_BASE_ADDR, NOR_MEMORY_16B, 0x555), 0x10);
do {
polling_counter--;
NOR_WRITE(NOR_ADDR_SHIFT(BSP_NOR_BASE_ADDR, NOR_MEMORY_16B, 0x555), 0x70);
status_reg = *(__IO uint32_t *)(uint32_t)BSP_NOR_BASE_ADDR;
if( (status_reg & 0x80) == 0x80 ) /* Are all devices done bit 7 is 1 */
break;
}while(polling_counter);
#if DEBUG
if ((status_reg & 0x20) == 0x20) {
PRINT_TEXT("Mass erase error");
mass_erase = 0;
} else {
PRINT_TEXT("Mass erase done!");
mass_erase = 1;
}
#endif
return mass_erase;
}
Solved! Go to Solution.
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Memory Nor Flash
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Hello,
In general, page read is taken care by hardware (host memory controller) so don’t need to change flash driver software.
Thank you
Regards,
Bushra
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Hello,
Thank you for contacting Infineon Technology. There are few differences between S29GL128N and S29GL512T
S29GL128N is 110 whereas S29GL512T is 45nm
S29GL-N Read Page Buffer Size is 16 byte. GL-T includes a 32 byte (16 word) read page buffer which is double the size of the GL-N flash. S29GL-N is CFI version 1.3 and S29GL-T is CFI version 1.5. Please refer to two migration applications note for more information.
Thank you
Regards,
Bushra
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Hello,
The A23 and A24 pin shouldn’t be unconnected. If you want to use just fist 128Mb of the S29GL512T, both pins need to be fixed to LOW.
And please confirm you can read device ID correctly.
Thank you
Regards,
Bushra
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Hi Bushra,
ok will connect to GND the A23 and A24 pins to ensure a valid address of 128Mb.
I can read device ID correctly and read the content, but I can't erase and program.
Best regards
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Hello,
In general, page read is taken care by hardware (host memory controller) so don’t need to change flash driver software.
Thank you
Regards,
Bushra
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Hi Bushra, thank you for your answer. About the difference of page buffer size in both memories, is needed change anything in the software? I use the HAL library from STM32 to issue the memory.
Best regards