S25FS512SDSMFI011 Linux 5.10.35 driver

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KeTs_2342536
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Hi Team,

 

Have S25FS512SDSMFI011 Linux 5.10.35 driver?

Main chip is NXP LS1046A.

Exist major issue is starting R/W issue of SPI Flash; read is OK, but write is fail at NOR Flash.

Regard,

Kevin

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Yuvraj
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250 replies posted 25 likes received 100 solutions authored

Hi,

The source code you are using has some problems.

1) You are using 4 as address length i.e., SPI_MEM_OP_ADDR(4,. This device is 3-byte address mode by default. So, you needs to use 3 or enter 4B address mode in advance.

2) You are using 0x0080004 as register address but CR3NV is assigned to 0x00000004.

3) dummy cycles for Read Any Register (65h) is 8 cycles by default. Use '1' (means '1' byte = 8 cycles in single SPI mode) instead of SPI_MEM_OP_NO_DUMMY.


Thanks and Regards,

Yuvraj 

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Yuvraj
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250 replies posted 25 likes received 100 solutions authored

Hi,

Thank you for contacting Infineon Technologies.

It looks like an issue of overlaid 4KB sector support in older version of Linux. 

Hope this would help: https://patchwork.ozlabs.org/project/linux-mtd/list/?series=205504&state=*

The patches in this link fixes that bugs.
It was upstreamed since v5.12.

Please confirm if this fix is already back-ported to your v5.10 version.


Regards,

Yuvraj 

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KeTs_2342536
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First like given 50 sign-ins First comment on blog

Hi Yuvraj,

We want to adjust Uniform Sector Architecture mode, but it seems impossible to adjust.

7.5.5.1.jpg

can not adjust.jpg

Could you help us?

It’s our exist source code.

code.jpg

Regard,

Kevin 

 

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Yuvraj
Moderator
Moderator
Moderator
250 replies posted 25 likes received 100 solutions authored

Hi,

The source code you are using has some problems.

1) You are using 4 as address length i.e., SPI_MEM_OP_ADDR(4,. This device is 3-byte address mode by default. So, you needs to use 3 or enter 4B address mode in advance.

2) You are using 0x0080004 as register address but CR3NV is assigned to 0x00000004.

3) dummy cycles for Read Any Register (65h) is 8 cycles by default. Use '1' (means '1' byte = 8 cycles in single SPI mode) instead of SPI_MEM_OP_NO_DUMMY.


Thanks and Regards,

Yuvraj 

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