Is there a time limit such as a timeout if there is a temporary waiting time during transmission / reception? If so, what would it behave? I couldn't find it in the datasheet.
In another device, there was a case where the SCL and SDA stuck at Low for a certain period of time (about 100ms) due to the SW processing of the master during I2C communication, and as a result, the slave device unintentionally timed out and the slave device reset. When I checked the specifications of the chip, the time-out specifications were listed, but it was not made with due consideration for SW.
I would like to check the specifications of the device to see if other devices are also considered.