S25FL512S Simulation Model: Is sector/bulk Erase required prior to Page Program (PP)?

[cypressfan101]

Hello,

I am currently simulating with the bus functional model for the S25FL512S memory part.

Is a sector or bulk erase (SE/BE) required prior to a page program (PP), in simulation?

Page 67 of the datasheet (https://www.cypress.com/file/177971/download) says, "The Sector Erase (SE) and Bulk Erase (BE) commands set all the bits in a sector or the entire memory array to 1. A bit needs to be first erased to 1 before programming can change it to a 0. While bits can be individually programmed from a 1 to 0, erasing bits from 0 to 1 must be done on a sector-wide (SE) or array-wide (BE) level."

It would seem that the an erase *is* required for the actual part, but I'm not sure how realistic the model is compared to the actual part. When we attempt to page program, we are seeing all 1's upon return. We are issuing WREN prior to every PP command.

Please advise, thanks.

[Apurva_S · Accepted solution]

Hi,

>> Is a sector or bulk erase (SE/BE) required prior to a page program (PP), in simulation? As it is already mentioned in the datasheet snippet (that you have posted in your comment), an erase is required prior to a program operation if you are trying to change a bit from 0 to 1. So, if you are trying to program a fresh device (which has all memory locations as 0xFF), you do not need to perform an erase operation before the page program operation. All the locations are already 0xFF, and you can directly start with page program operation and program your data to the flash. Now, If you are going to perform page program operation on a location which has been programmed previously (some of the bits in that location may be 0 which need to be changed to 1), then you will need to perform an erase operation before the page program operation, because only an erase can change a bit from 0 to 1. Also note that erase operations are always performed on large area of memory (sector/block/full chip). So, even though you want to change a single bit from 0 to 1, you will still need to erase a large section of memory to achieve this. The above explanation is also applicable to simulations.

>>  When we attempt to page program, we are seeing all 1's upon return. We are issuing WREN prior to every PP command. Could you please provide a little more details about your application?

1. Please tell the version of the verilog model that you are using.
2. Are you using the SDF file in your simulation?
3. Please tell the exact sequence of commands that you are following.
4. Are you polling the WIP and P_ERR bit of the status register after the page program command transfer?
5. If possible, please provide the waveform of the page program operation in your simulation.

Regards.