S25FL256S QSPI Flash Program Issue

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Gatsby253
Level 1
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First reply posted First question asked Welcome!

FLASH: S25FL256S (Uniform 64KB sectors)

Hi,

I was trying to program my QSPI flash memory on my board.

However, it seems that the first 8 bytes in each bank (128Mb) of flash cannot be written.

The 0x00000000~0x00000007 and 0x01000000~0x01000007 always remains as 0xFF after erase, and cannot be programmed again.

 

Here is what i did:

1. Erase the whole chip using Bulk Erase Command. [Send: 0x60]

2. Perform a blank-check in 0x00000000~0x000000FF and 0x01000000~0x010000FF. [Read back, all the bytes are 0xFF]

3. Program 0x00000000~0x000000FF and 0x01000000~0x010000FF with an increased number serial (0x00~0xFF)

   [Send: 0x12      0x00 0x00 x00 0x00      0x00 ... 0xFF]

   [Send: 0x12      0x01 0x00 x00 0x00      0x00 ... 0xFF]

4. Read back. (The first 8 bytes cannot be written)

 0x00000000~0x0000100F: 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF  0x08 0x09 0x0A 0x0B ... 0xFD 0xFE 0xFF

 0x01000000~0x0100000F: 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF  0x08 0x09 0x0A 0x0B ... 0xFD 0xFE 0xFF

 

But when I try other addresses, such as 0x00000100~0x00000200, I can read exactly what I write.

How can I write the first 8 bytes in each bank of S25FL256S ?

THANKS!

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3 Replies
SudheeshK
Moderator
Moderator
Moderator
250 sign-ins First question asked 750 replies posted

Hello,

Could you please provide more details about this issue?

  1. I assume that you are using single SPI mode to communicate with the flash device. Please confirm.
  2. Which is the read command that you use to read data from flash?
  3. Could you please provide logic analyzer traces (SPI waveforms) of program and read operation for both the working and failing cases?
  4. How many devices are showing this behavior? Are you observing it with all of the flash devices that you tested?

Thanks and Regards,

Sudheesh

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Sudheesh, thanks for your reply.

1. I use single SPI mode in the programming phase, and quad SPI mode in the reading phase. QUAD bit in Configuration Register 1 is 1.

2. Quad Output Read (QOR 6Bh),  with 24-bit address and 8 dummy cycles.  I set Bank Address Register to 0x01 before reading data in 0x01000000~0x010000FF

3. Sorry I can't. I'm using Xilinx Zynq SoC, the QSPI bus is in PS,  it not easy to catch the waveforms.

4. This behavior present in all devices that I've tested.

PS.  All the other address range(besides  0x00000000~0x0000000F and 0x01000000~0x0100000F ) can be programed and read perfectly.

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SudheeshK
Moderator
Moderator
Moderator
250 sign-ins First question asked 750 replies posted

Hello, 

It is very strange that you are facing this issue only at addresses 0x00000000~0x000000FF and 0x01000000~0x010000FF. Could you please try to read data using the single SPI read command 13h? The command 13h needs 4 bytes of address similar to the program command that you use 12h. Command sequence is as below,

SudheeshK_0-1617691476948.png

Please let us know, if you are observing similar behavior with 13h command also.

Thanks and Regards,

Sudheesh

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