S25FL128L , WEN not set

[Lilly]

Hi ,

I am using S25FL128L SPI flash memory in Single bit mode.
Reading of the register SR1, SR2, CR1, CR2, CR3 and UID seems to work, because all register have their default value.
But when I try to write some data to the flash I have problems. The first command of a write operation is the WRE (0x06) command. After sending the WRE command I read SR1 and check the WEL bit. I read the SR1 serval times, but this bit never goes high.
Can you please help me find the cause of this?

Thank you

[BushraH_91]

Hello,

Thank you for contacting Cypress Technical Support, an Infineon Technologies Company. Currently we are reviewing the case and will get back to you as soon as we find the resolution.

Regards,

Bushra

[BushraH_91]

Hello,

Can you please check and provide us the information?

1. Is there any other command sent to flash between WREN command and read SR1 command?
2. Is it possible to capture Logic Analyzer trace for the WREN command?
3. Try below test to see if WREN works:

1. Send software reset commands: 0x66, then 0x99
2. Send WREN command 0x06
3. Read SR1

Thank you

Regards,

Bushra

[Lilly]

Hello,

thank you very much for the quick reply. I think I now know the cause of the behavior, but unfortunately I haven't found a solution yet.
We use a TMS320F2807x microcontroller which only supports words (16 bit).
A DMA module is used with a SPI as peripheral trigger event. This means that words are always sent when a command is sent. With a read command this is no problem, because in addition to the 8 bits for the command 8 dummy bits are forced to read (= 1 word). When sending the WREN command, 8 additional dummy bits are sent.

The SPI can be configured so that only 8 bits of a word are sent. When reading out the SR1 with this configuration, the WEN bit ist set (can seen on the analyzer).

 

 

Unfortunately the reception via the DMA Rx channel does not work anymore. It would also be very unattractive to send the content of word addressed data objects in this way.
How can I make it possible that commados or operations consisting of an odd number of bytes are processed correctly. Can the value "Read Latency" from CR3 be used for read commands and is there such a possibility also for write commands?

Thank you!

[BushraH_91]

Hello,

Yes, the reason of the failure is that CS# signal is not driven high after the eighth bit of the command. This violates the spec.

Unfortunately, Read Latency from CR3 is only for read operations. For sending commands to flash, no latency is needed. Flash immediately takes whatever it receives. The timing requirements for sending command to flash has to be satisfied.

Thank you

Regards,

Bushra

[Lilly · Accepted solution]

Hello,

sorry, I forgot to answer the above questions.

1. no there is no other command
2. see notes in my last post
3. the behavior remains unchanged

Best regards