Hi,
We recently processed a batch of S29GL128 wafers for assembly of the die into our System-In-Package product.
The wafers were supplied with electronic wafer maps generated by wafer probe test.
The wafer map has bin codes as below, see typical example extracted from the map file:
<Bin BinCode="1" BinCount="1391" BinQuality="Pass" BinDescription="Pass"/>
<Bin BinCode="X" BinCount="79" BinQuality="Fail" BinDescription="Fail"/>
<Bin BinCode="0" BinCount="462" BinQuality="NULL" BinDescription="NULL"/>
There were 8 wafers in one lot, in a single .XML map file for the batch. And 3 wafers from another lot in a single batch .XML file.
After the sub-contractor has picked the die and made the assembly there are some strange results showing in a qty of 160 pcs.
For these 160 PCS we are seeing a different Flash-ID register entry compared with the rest of the die.
Adr 0000h: Should have been: 0001h but we found : FFFFh
Adr 0001h: Should have been: 227Eh but we found : FFFFh
Adr 000Eh: Should have been: 2221h but we found : FFFFh
Adr 000Fh: Should have been: 2201h but we found : FFFFh
Attached you can find a dump file of the relevant memory area in CFI mode. This dump also shows us further differences in the memory when comparing what we consider a "good" memory with a "bad" one.
What we would like to know is how this difference is happening and if we should have concerns about the product?
Please can you help us answer the below questions:
How is it possible that two die can exist from the same wafer batch but reading with different data?
During the probe testing is there a die programming happening which is a normal part of the probe test bin process?
If yes, is it possible that across a batch of multiple wafers two different test programs could be used which might cause this different data?
If no, what else could control the difference in data?
During the probe testing if a die is given status "Fail" bin - is there a programming of the die made to electrically indicate this Fail status? And same situation for a "Pass" bin with data programming to indicate the pass. We are wondering if one possible cause may be that somehow our assembler has picked the "Fail" bins as well as the "Pass" bins.
Our main concern at the moment is to identify what we are seeing and how it could be happening. And then to understand if we should have any concern using these 160 PCS with the different data and what is correct.
