QUERIES FOR CONFIGURATION OF QSPI USING SEMPER FLASH2 S25HL512T

[Shraddha]

FOR QUAD SPI CONFIGURATION

CONNECTIONS :-

CS,CLK,SD0,SDI,3V3,GND,IO2,IO3-->CONNECTED 

RST--->GPIO PIN DRIVE TO ZERO FOR SMALL DURATION 

CLOCK CALCULATION;- 

Iam able to read the device Id through 1s-1s-1s but facing problems for QSPI 4S-4S-4S 

cs#low --->command 99(software reset)-->cs#high--->cs#low--->9f command ---->64 bit read cycles--->cs#high 

previously for 1s-1s-1s i had connected reset to IO2 pin  then i was able to read the device id correctly but for qspi mode what is the issue do i need to change the clock calculation,  you can refer the waveform

[Yuvraj · Accepted solution]

Hi,

Thank you for contacting Infineon Technologies.

Configuration Register-1, bit-1 (CFR1N[1]) and Configuration Register-2, bit-6 (CFR2N[6]) must both be set to configure the S25HL512T into the QUAD mode, hence:

CFR1N[1] = QUADIT = Quad SPI Interface Selection - I/O width set to 4 bits

 Selection Options (either '1' or '0'):
  0 = Data Width set to 1 or 2 bits wide (1x - Single, 2x - Dual)
  1 = Data Width set to 4 wide (4x - Quad) 

CFR2N[6] = QPI-IT = QPI Interface & Protocol Selection - I/O width set to 4 bits (4-4-4)

 Selection Options (either '1' or '0'):
  0 = Data Width set to 1 or 2 bits wide (1x - Single, 2x - Dual) - Legacy Protocol
  1 = Data Width set to 4 wide (4x - Quad) - QPI Protocol

With regards to the Quad Transaction names and commands, please refer to Table 77,

starting on pgs. 98 through 103 for the Quad (in 4-4-4) mode.  Other Quad modes are

on the previous pages.

Regards,

Yuvraj

[Shraddha]

hello ,

 I had implemented the QSPI, the problem which I'm facing is that 

1)  to read the device id , configuration register 1 and 2 both through spi , first I tried to read the configuration register 2 i.e.  in 1s-1s-1s and then it was showing 08 by default value , that was working well 

2) after that i tried to write on the memory 0x00800003 then after that it got converted to  (4s-4s-4s) format 

3)when I'm trying to read the cfgr 2 in  4s-4s-4s  it not accepting the command which i had used 

Read Mode:- CS(high)--->CS(low)--->cmd(65)--->address(0x00800003)---->read cycles

Write Mode:- CS(High)--->CS(low)---->cmd(06)--->cmd(71)--->cmd(0x00800003)--->cmd(68)

Read Mode:- CS(High)---->CS(low)----> cmd(65)--->cmd(0x00800003)--->read cycles

its not working let me know where I'am going wrong output wave form i have attached 

[Shraddha]

Iam successfully able to enable the configuration register1 ,  1st bit by writing 02 ,

To enable the 6th bit for configuration register 2 , by default its value is 08 ,i am writing 48 to enable the 6th bit but its not accepting , its going to FFFFF mode

what is the reason? what data should i enter?