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Nor Flash Forum Discussions

Anonymous
Not applicable

At first, there was no problem when I downloaded my .jic file to S25FL128S. However, after operating the Flash through "Generic Serial Flash Interface Intel FPGA IP Core" (including writing and reading memory, sector erase, sector protect and so on), I can not program the Flash any more.

The screenshot of the Quartus Prime 18.0 programmer and the messages are shown below. FYI. Pls help!

1546933309(1).jpg1546933323(1).jpg

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5 Replies
TakahiroK_16
Employee
Employee
100 replies posted 50 replies posted 25 solutions authored

Hello,

Did you protect any sectors via the "Generic Serial Flash Interface Intel FPGA IP Core"?

If no, a potential cause is that power loss during write register operation. Please refer to Power Loss During the Write Register (WRR) Operation in Serial NOR Flash Devices – KBA221246 and check if this is possible to happen in your system.

Thanks,

Takahiro

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Anonymous
Not applicable

Hi Takahiro,

Thanks for you reply.

I checked the issue with another FPGA board.

1. At first, the jic file can be programmed into the S25FL128S.

2. Then, I execute sector protect operation on S25FL128S with "Generic Serial Flash Interface Intel FPGA IP Core".

3. Then, I failed to program the jic file into S25FL128S, which is expected due to the sector protect operation in step 2.

4. I unprotect the S25FL128S with "Generic Serial Flash Interface Intel FPGA IP Core".

5. Still, no way to download the jic into S25FL128S.

I doubt if some register bits of S25FL128S is locked to prevent the programming operation after step3. Do you have any clue?

Thx so much!

Leo

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Hi Leo,

Thanks for checking it.

Do you know what protection method does the Generic Serial ... IP Core use? The FL128S has legacy block protection and advanced block protection. Assuming it's the legacy one, is it possible to check Configuration Register 1, bit 3 value? It can be accessed by RDCR(35h) command. If the CR1[3] is set to 1, the Block Protection bits in Status Register always set to 1 (protected) after power on or reset.

pastedImage_1.png

Thanks,

Takahiro

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Anonymous
Not applicable

Hi Takahiro,

I've read the content of the Configuration Register 1, and the value of bit 3 is 0.

I protected the S25FL128 through writing the status register and Configuration Register 1 (WRR, 01h), which I think is the legacy block protection method.

Thanks,

Leo

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Hi Leo,

I would like to check what commands/data are issued from the Generic Serial Flash Interface Intel FPGA IP Core. Is it possible to share scripts or source codes you are using?

Best Regards,

Takahiro

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