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Hello!
Now I want to use DDR transaction protocol (4S-4D-4D) with S25HS512T,and then how I would set the flash, which registers or pameraters should be configurated.
Solved! Go to Solution.
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Hi @lushuizhudan ,
You can use the command mentioned in Table 77 of the datasheet to read.
Thanks,
Ronak
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Hi @lushuizhudan ,
You can enable the bit QPI-IT in Configuration Register 2 i.e. CFR1V[1] which changes the mode to QPI mode.
Thanks,
Ronak
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I have enabled bit QIO in Configuration Register 2 : CFR2V[6] which change the mode to QPI mode(4-4-4), but data can not be read normally, Does the flash not support this mode(4-4-4) with DDR read transaction?
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Hi @lushuizhudan ,
You can use the command mentioned in Table 77 of the datasheet to read.
Thanks,
Ronak