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xiaowei_li_3787
Level 4
Level 4

Hi

I am using the flash chip of CYPRESS,S25FL128SAGNFI000, but I have some questions that i don't understand when I do the simulation.

I am doing the simulation of QPP command, but when I do the QPP command for several times , there are some of the cases that indicate there is a program error happen.

but these cases are all the same except the address and the write data, So could you help me to find out why the program errors happen?

(the commadn execution sequence is as follows: (CR1 has already been set as quad mode)

the system send the QPP signals, then the FLASH control module send the commands to the flash chip like this sequence:

1, WREN+RDSR1 (make sure that the WEL is enable)

2, QPP+ADDRESS+DATA(quad mode, 32bit data )

3, RDSR1(polling to check the WIP )

I did the qpp command like 6 times , but just like the figure, at the 2nd and 3rd time, the program error happened.

After sending the QPP command and address and data, polling the SR1 , then the SR1[6]=1, which means that there is a program error happened.

01122.PNG

01121.PNG

the six times of address and write data are as followes:

1,  FL_ADDRESS_tmp <= X"000000";

    FL_WDAT_tmp  <= X"12341122";

2,  FL_ADDRESS_tmp <= X"000004";

    FL_WDAT_tmp  <= X"23451122";

3,  FL_ADDRESS_tmp <= X"00000C";

    FL_WDAT_tmp  <= X"34561122";

4,  FL_ADDRESS_tmp <= X"0048D0";

    FL_WDAT_tmp  <= X"45671122";

5,  FL_ADDRESS_tmp <= X"0159E0";

    FL_WDAT_tmp  <= X"56781122";

6,  FL_ADDRESS_tmp <= X"01E268";

    FL_WDAT_tmp  <= X"67891122";

I think there may be something which says that  the first QPP address and second QPP address should't be too close, otherwise there will be a program error.

But according to the datasheet, I can't find the description about this.

I can't figure out why this phenomenon happened...

Could you help me with that?

Thank you so much and looking forward to your reply~~

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1 Solution
AS_36
Moderator
Moderator
Moderator
500 replies posted 250 solutions authored 250 replies posted

Hi,

I am attaching the updated Verilog model with my response.

Regards,

Apurva

View solution in original post

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8 Replies
xiaowei_li_3787
Level 4
Level 4

Excuse me, is there someone can help me with this question?

Thank you so much~~

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Hi,

Sincere apologies for the delay.

We are discussing your problem internally, and shall get back to you shortly.

Thanks and Regards,

Apurva

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Hi a,

Thank you so much for your help.

Please let me know as soon as possible if there are some new ideas.

Thanks again~

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Hi,

For QPP it is required that programming should be done to one full page at a time. While less than a full page of data may be loaded for programming, the entire page is considered programmed. Any locations not filled with data will be left as one, but the same page must not be programmed more than once.

If 000000 location is being programmed in the first operation, then the 2nd and 3rd operation will throw an error, as 000004 and 00000C are all the same page.

Regards,

Apurva

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Hi A,

Thank you so much for your help!

There are two more questions that I want to confirm.

1, Sorry to ask, is there some illustrations about the "page programed only once thing" in the datasheet of the chip?

Because I can't find the illustration that each page should be programed only once, so I think this is why the error happened.

If I can understand like this:

If I want to use the QPP command to program 32bit data each time, these 32bits data won't be in the same page?

Or say, I can't program the 32bits data with QPP command at the continuous address?

2, If I want to program 32bit data each time at the continuous address, I think the PP command will be OK, is this right?

Thanks again and looking forward to your reply~~~

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Hi,

Since we were discussing the simulation of the QPP command, the previous response was according to the Verilog model. The datasheets are not prepared according to the verilog model, rather they are based on the behavior of the actual physical part.

Ideally, model should behave exactly like physical parts, but if it doesn't there might be some inconsistency between the model and the physical part. If the model doesn't work, it might need to be modified.

I am checking this issue internally with our Verilog team

Thanks and Regards,

Apurva

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AS_36
Moderator
Moderator
Moderator
500 replies posted 250 solutions authored 250 replies posted

Hi,

I am attaching the updated Verilog model with my response.

Regards,

Apurva

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Hi A,

Thank you so much for your careful reply!

I will have the test with your source model as soon as possible!

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