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Hi Team,
In our project we are using the SPI based NOR flash chip as a slave, whose ordering part number is S25FL256SAGMFI000. As mentioned in the data sheet the sectors are organized as per the Ordering Part Number i.e. in our case the sectors are A Hybrid of 32 * 4-KBsectors with all remaining sectors being 64KB sectors with 256B programming Buffer. But when we actually see in the Data sheet section 8.2 Flash Memory Array, we have found there are two ways that these sectors can be arranged, which are Bottom 4Kbyte or Top 4Kbyte. We wanted to know what are the factors which decides the organization of these sectors for this NOR flash chip.
Secondly, When 4P4E command sent for erasing the 4-KB sector, after the command the data sheet suggests to pass the 4byte address, in that case with this command, which of the addresses will get erased? What happens if the address passed is lies in the middle of the sector? whether it will erase 4KB size, continuing from that address or erase the 4KB sectors where the address lies?
Regards,
Shivam
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Hi Shivam,
>> We wanted to know what are the factors which decides the organization of these sectors for this NOR flash chip
You can read the Configuration Register 1 bit 2 CR1[2] - TBPARM to determine the location of 4KB sectors. Default value of this bit is 0 which means 4KB sectors are located at the bottom (low address). It is a One Time Programmable (OTP) bit. Which means you can program it to 1 to change the location of the 4KB sectors but ONLY once. Once programmed you can't erase it back to 0.
>> What happens if the address passed is lies in the middle of the sector? whether it will erase 4KB size, continuing from that address or erase the 4KB sectors where the address lies?
It will erase that particular 4KB sector to which the passed address belongs to. Sector architecture inside the flash is fixed. To erase a sector, you can send any address within that particular sector.
Regards.
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Hi Shivam,
>> We wanted to know what are the factors which decides the organization of these sectors for this NOR flash chip
You can read the Configuration Register 1 bit 2 CR1[2] - TBPARM to determine the location of 4KB sectors. Default value of this bit is 0 which means 4KB sectors are located at the bottom (low address). It is a One Time Programmable (OTP) bit. Which means you can program it to 1 to change the location of the 4KB sectors but ONLY once. Once programmed you can't erase it back to 0.
>> What happens if the address passed is lies in the middle of the sector? whether it will erase 4KB size, continuing from that address or erase the 4KB sectors where the address lies?
It will erase that particular 4KB sector to which the passed address belongs to. Sector architecture inside the flash is fixed. To erase a sector, you can send any address within that particular sector.
Regards.
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Thanks for responding. This answer will help us in our project. Appreciate the quick response.