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Non Volatile RAM (F-RAM & NVSRAM) Forum Discussions

gingerologist
Level 1
First question asked Welcome!
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we have a prototyping board equipped with fram (part number cy15v108qn-20lpxi). The mcu controller is ti's cc2640r2f. I have tried both gpio bitbang and spi hardware to read status register. The results are the same. the first byte, 0x05, is issued from mcu and the fram chip did respond a byte, an 0x0c, which is an illegal value according to manual, since the bit 6 is not set. Also bit 2 & bit 3 is not the default value (supposed to be 0).

Attached are waveforms I photoed from my osilloscope (sorry that i have only a low-cost, dual-channel one at hand, but I think it is enough for the job). One shows the first byte is 0x05, correctly issued from the host. The other shows the second byte replied from fram. The wave form looks OK but the value 0x0c is incorrect according to datasheet.

Also, I have tried to read device id (0x9f) and unique id (0x4c). Both commands returned only zeros, which seems to be incorrect.

 

any good explanations for the problems? or any timing error in wave forms? or the chips are broken? shed me some light.

 

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1 Solution
ritwicksharma
Moderator
Moderator 100 replies posted 50 solutions authored First question asked
Moderator

Hi @gingerologist,

 

If you are compliant with all the datasheet specs and SPI connections are proper, you should be able to at least read the device id correctly.

1. Could you please confirm if you are operating within the Operating Range?


2. Could you please confirm if you are meeting the power cycle timing specs (tPU, tVR, and tVF) mentioned in the datasheet on pg no. 32? Or could you please share the power-up and down waveforms with us?


3. Could you please confirm if you have shorted the GND of both boards? Also, please share the schematic of the FRAM part.


Thanks,
Ritwick

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ritwicksharma
Moderator
Moderator 100 replies posted 50 solutions authored First question asked
Moderator

Hi @gingerologist,

 

If you are compliant with all the datasheet specs and SPI connections are proper, you should be able to at least read the device id correctly.

1. Could you please confirm if you are operating within the Operating Range?


2. Could you please confirm if you are meeting the power cycle timing specs (tPU, tVR, and tVF) mentioned in the datasheet on pg no. 32? Or could you please share the power-up and down waveforms with us?


3. Could you please confirm if you have shorted the GND of both boards? Also, please share the schematic of the FRAM part.


Thanks,
Ritwick

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