Non Volatile RAM (F-RAM & NVSRAM) Forum Discussions
Hi,
I am designing a memory array of 16 or possibly 32 FRAM (SPI) devices for a battery operated datalogger for remote outdoor location. I have looked at the DC Characteristic in the datasheet for CY15B104Q (512K x 😎 in particular the I/O voltage thresholds, Ioh, Iol and ILi figures. From these figures it is possible to construct an array of 32 devices. The design has individual /CS for each device so only one device is active and the rest tri-stated. My real concern is the Input capacitance that would be in the region of 6x32=192pf + board layout capacitance..Could you please comment on this. Many thanks for the help.
Show LessHello
I am extremely new to Cypress and have started using the CY8CKIT-042-BLE PIONEER KIT. It comes with PSoC4 and PRoC BLE. I was looking to store some data on the onboard 1MB F-RAM and retrieve it from there and so far haven't really gone anywhere with it. Are there any sample programs/code or tutorials showing the process of doing this from a programming point of view.
I am pretty much a beginner in this and any help will be much appreciated.
Thanks a lot in advance
Aviraj
Show LessHi
I am using FM25V01 128-Kbit (16 K × 😎 Serial (SPI) F-RAM. After storing the data in to the flash ,want to read the data from the flash for full memory region. Is there any tool or device like PROM Programmer to directly read the dumped data to read this F-RAM. Please help on this. If you know any tools suggest me.
Show LessI have an application where a FRAM will be subject to a strong Magnetic field. I did find a document that discusses the behavior of an FRAM to radiation. Can you forward a document that discusses how a FRAM would be impacted by a strong Magnetic field?
Show LessPart FM3164-GTR does not respond / answer to impulse / frames sent on i2c bus.
After sent START bit and SLAVE address the FM3164’s should answer by getting datalines acknowledge (ryc.18 from the datasheet) but there was no acknowledgement.
There was no reaction to the released address. The speed was changed to both maximum and minimum settings but this wouldn’t work either.
Please help us, thank you.
Show LessHi
I'm implementing a linux driver for CY14B512I on chip DM8127.
In the "Slave Device Address" section, in Table1 "Slave Device Addressing" there is a field called "Device Select ID".
I couldn't find what that "Device Select ID" means.
Hope you can help me with that.
BR. Hagai
Show LessHello,
The FM1608B is a TTL compatible part, but I see now it is discontinued. The FM16W08 is the recommended replacement part, but it appears to be not compatible with TTL. Could you please confirm?
Regards,
Kiefer
Show LessHi all,
We are using the CY14B104NA on our board, have problem with the software store/recall function.
The hardware seems fine, hardware sotre(by pull HSB low) operation works.
During READ mode, the CE, WE and OE signal looks correct too.
I'd like to ask, is there any code example on how to use the software store/recall function?
below is my code, can you please take a look to check if anything goes wrong?
Thanks a lot!
############################################
p = NV_SRAM_BASE_ADRS + (0x4E38 ); /* NV_SRAM_BASE_ADRS is the base address of SRAM */
val = *((UINT16*)p);
p = NV_SRAM_BASE_ADRS + (0xB1C7 );
val = *((UINT16*)p);
p = NV_SRAM_BASE_ADRS + (0x83E0 );
val = *((UINT16*)p);
p = NV_SRAM_BASE_ADRS + (0x7C1F );
val = *((UINT16*)p);
p = NV_SRAM_BASE_ADRS + (0x703F );
val = *((UINT16*)p);
p = NV_SRAM_BASE_ADRS + (0x8FC0 );
val = *((UINT16*)p);
#####################################################
Show LessHi everyone..
I am trying to interface the cypress NVSRAM cy14b101L with an 8051 micro controller. Before I was using HY62256 SRAM and now I am trying to use the above said NVSRAM. The SRAM comes witha PCB in which the 32 pins were brought out as a PDIP package and it also consists of Vcap capacitor and two more IC's in it. I was told that By using the NVSRAM along with the PCB it can be simply replaced by the normal SRAM in the circuit. I have followed the steps below to interface the NVSRAM.
1. Adress lines of the NVS RAM were connected to the 8051 adress lines.Two address lines A15,A16 were left floating.
2. HSB left floating.
3. Vcap left floating as already present in the PCB.
4.A15 of the controller connected to CE of the NVS RAM
5. Remaining datalines are connected as it is accordingly to the pin numbers.
Now the problem is the circuit is behaving as such there is no NVSRAM itself. Any body have any idea where I maybe going wrong. Or any modifications in the circuit or program that has to be done. Please help me...
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