Non Volatile RAM (F-RAM & NVSRAM) Forum Discussions

Hi, can anybody explain this behaviour to me please (see scope capture)?

I write 3 bytes to memory like this:

Chip select low

Send WREN (0x06), WRITE (0x02), high addr (0x61) low addr (0x5E), data (0x0B, 0x81, 0x51)

Chip select high (some 20us or so)

Chip select low 

Send READ (0x03), high addr (0x61) low addr (0x5E),  dummy data (0x00, 0x00,0x00)

Returned data comes back in the order 0x51, 0x81, 0x0B

Why does the data come back in reverse order when I start from the same address?

When using CY15B102Q-SXET originally produced by your company, we found that the side of the pin of CY15B102Q-SXET(SOIC-8 package) does not tin, so we need to increase the soldering iron temperature and welding time to repair the solder joint of the pin. But this method will cause hidden trouble to the quality of the chip.
Subsequently, our company transferred ten CY15B102Q-SXET from the warehouse. Before any treatment, all the chip pins showed a dull and dull state; After operation according to method 2003.1 weldability of "GJB548B-2005 Test Method for Microelectronic Devices", all chip pins show bright coating, continuous tin surface, full coating and good tin from the front view; When all the chips were raised to observe the side of the pins, it was found that there were pitting points, no wetting of the coating and discontinuous tinning on the side of the pins.
We believe that this situation is not the cause of preservation, but the quality of the device reference script. If it is a preservation problem, it should be that the entire pin is not oxidized on the tin; However, after the test, the pin face, the front heel, the back heel to follow the tin are particularly good, only the two sides of the pin on the tin effect is particularly poor.
Could you tell us how we should handle this situation? Looking forward to your reply very much.

Normally, I would expect to see the Seal Date earlier than the Mark Date since the packaging of the component in its final form precedes the Top Marking.  

Is it ever possible to find a Seal Date that is after the Mark Date?

I'm not getting data returned back from the FRAM chip when I send a read request or RDID request.

I'm not sure what I'm doing wrong.  

I've attached my wave forms of HOLD_N, CS_N, serial data out of FRAM, serial data into FRAM, CLK, WP_N.

Any help would be appreciated.

The website lists the reflow temperature as 220°, but the data sheet lists it as 260°. Is 260° correct?

CY14B101J2-SXIT

https://www.infineon.com/cms/jp/product/memories/nvsram-non-volatile-sram/cy14b101j2-sxit/

データシート

https://www.infineon.com/dgdl/Infineon-CY14C101J_CY14B101J_CY14E101J_1_MBIT_(128K_X_8)_SERIAL_(I2C)_NVSRAM-DataSheet-v17_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ebfc9013449

Please can you share the part number for this top marking CY152B3. In community response i see both CY15B102QN-50SXE & CY15B104QSN-108SXI are with same top marking. Where can i find this top marking description in datasheet.

Is there any command or method to batch erase regarding the non-volatile part of NvSRAM?
Although it is OK to perform clear (WRITE) processing from the upper CPU to all addresses,
However, with an access time of 45ns, it would take several tens of ms to clear all 16Mbit addresses, so I was wondering if there is a process that can clear all addresses in one shot.
We would appreciate your confirmation.

I perchased the parts of CY15B108QN-40SXI, but the marking of them is “CY153D3”. We doubt that we received wrong parts.

Pls help to check that, thank  you.

Hello,

I am looking for a software which writes data to FRAM (FM25V20A-G) from PC. Can FLASH USB Programmer New 8FX work for FRAM also? If it doesn't, is there any software I can use?

Thank you

I'm encountering a problem with my Code Composer Studio (CCS) project, specifically related to incorrect data storage and retrieval in FRAM. I have global variables declared as int16 in my code, and I'm consistently using int16 data types throughout. However, when I store and retrieve these variables in FRAM, the data appears to be getting corrupted or misinterpreted. Here are the key details:

• I'm using a specific range of memory addresses for FRAM storage, including 0x380000.
• The FRAM hardware I'm using is an FM18W08, with a capacity of 32 kilobytes by 8 bits.

I'm utilizing the FM18W08 for data storage and examining the stored variables within the Code Composer Studio (CCS) expression window. My hardware is the F28388D DSP (CPU1). I've enabled the chip select (CS) functionality using a memory address, employing the SN74LVC138A 3-Line to 8-Line Decoders/Demultiplexers. Specifically, I've utilized EMIF1 CS4n to trigger the SN74LVC138A, and CS4n covers a memory address range spanning from 0x380000 to 0x3DFFFF.

Within this address range, I've allocated addresses from 0x390000 to 0x3D0000 for other purposes within the code. Starting at memory address 0x380000 and defining a length of 0x008000, I've successfully stored data ranging from 0 to 255. However, when attempting to store values outside of this range, the data interpretation appears to be incorrect.

To illustrate this issue further, let's consider three global variables: 'a,' 'b,' and 'c.' Initially, 'a' is assigned the value 3, 'b' is assigned -3, and 'c' is assigned 260. However, upon storage and retrieval, 'a' retains its value of 3, 'b' appears to be interpreted as 253, and 'c' is read as 4.