Non Volatile RAM (F-RAM & NVSRAM) Forum Discussions
What could cause the NVSRAM to cease allowing writes? We write to the device as part of an active test, but cannot read the latest data, only previous data so the test fails.
Show LessHello CYPRESS Team,
I currently working on the automotive projet. I need some component who can generate a signal as long as possible (rising edge or falling edge) to wake up a microcontroller in sleep mode. I also want to reccord some setup information.
I bought the CY14B101PA because it include a RTC and NvSRAM to memory. I test it but this component can't generate a signal on backup mode.(page 23 third paragraph).
So I decided to choose a other RTC to wake up my microcontroller and took a additional component to reccord some data.
After some research I found the the CY14B101Q and the CY15B102Q. If I understand your datasheets the CY14B101Q is the same component as the CY14B101PA without RTC application. The CY15B102Q has the same application than the CY14B101Q reccord data, but it doesn't required a Vcap to memory the SRAM information in the QuantumTrap because it use the F-RAM technologie. The memory access is faster and the SPI are a slower (25MHz for the CY15B102Q and 40MHz for the CY14B101Q). I think the CY15B102Q is a good choice even if is more expensive than the CY14B101Q, it automotive certified. But I have some questions about the CY15B102Q for the fast read memory data and the electronic design.
The SPI speed of the CY15B102Q are up to 25MHz and except a misunderstanding from myself all op-codes are avaible at this speed.
In that case can you tell me the differences between the read op-code and the fast read op-code?
To make my electronic design may I use the AN64574 Figure (2. 8-pin SPI nvSRAM Interface (No VCAP) with Controller) for the CY15B102Q ?
Best regards
Gaëtan COBIGO
Show LessHello,
We are currently using for our development thefolloiwng component : FM25CL64B-G
I would like to know if there are errata sheets known for this component.
Best regards,
Christopher
I've been successfully using FM25CL64B (64Kbit SPI FRAM) in tests and in an application. I decided to increase the amount of FRAM and got a couple of FM25V01A's (128Kbit SPI FRAM) to try out. As far as I can tell from the datasheets, there is essentially no difference between the 64 and 128Kbit versions. That is, the pinouts are the same, the op codes are the same. The FM25V01A of course uses one more bit in addressing, but since addresses are two bytes long (with appropriate high bits ignored), there is no difference in SPI data sent via MOSI.
I believe there are some differences in power up time, but those are very little and I've accounted for them as far as I can tell.
There are differences in that the FM25V01A can have various blocks of memory write-protected, but they should come up without protection by default, and I have certainly not changed the register that controls that in any way.
However, my code, which I believe should work essentially seamlessly with the FM25V01A as it does with the FM25CL64B, does not.
I suppose I can't tell if I'm only unable to read OR unable to both write and read (since I can't read ....). With a logic analyzer I can see the clock and MOSI being sent fine. Nothing seems to come down the MISO line.
I've tried two individual chips (thinking that perhaps I'd burnt out the first while soldering the SOIC-8 package to a breakout board), but no. I have two chips not working in precisely the same way.
And so, my questions. Has anyone else had a similar experience moving from the FM25CL64B to the FM25V01A?
Any suggestions?
Thanks for any help.
Show LessHi,
I cannot get my FRAM CY15B104Q to respond to any SPI commands. SO remains Tri-Stated.
I have placed a 4.7 k pull-up resistor on the CS signal. I cannot meet the spec of > 50 kV/us for power up, I get around 34 kV/u but the supply is from a linear regulator (not switch mode) and ramps up without any glitches. I have attached a scope of the power up sequence. I am measuring on the pins of the device and have disconnected the SO output from the circuit so the processor is not influencing it.
I am using an STM32H7 Nucleo board which I have used with FRAM FM25V02 32K with a NUCLEO and Waveshare boards before without any problems.
I meet the power up time requirement of 1 ms.
I have attached a RDSR Op-code sequence which shows the lack of output. My understanding of the documentation says that Bit 6 should be 1.
I have tried the RDID command and again and also get no output from the SO pin.
I have tried two devices with the same result.
I sourced the devices from Mouser Australia December 2018. I have attached a photo-micrograph of the device. The chips came embedded in conductive foam and I handled them on an earthed pad with wrist band.
Another interesting fact is that the Vdd standby current of both devices is around 2.4 mA when not being clocked which is a lot more than the spec sheet of 150uA max.
The numbers on the chips are:
CY15B104QIS
642759
CYP1743
I notice that other people have had similar problems, (bauerm_3865946) but there didn't seem to be an answer.
I have had good results with other Cypress FRAM and am a bit disappointed in this version. I don't wish to change to MRAM or Flash as I require a low power memory. The device will be used on a battery powered wearable medical monitor. I am only using the Nucleo for software development.
Best Regards
Rob
Show LessI am currently using FM25V02 FRAM Over SPI. I followed the changes suggested in one of the thread to change the spi-nor.c file but the kernel log says unable to read JEDEC DATA.
Show LessHello,
I found that NVRAM SPI component does not support 4Kbits FRAM memory?
Is there any specific components or driver for them?
The problem is that 4Kbit memories has only one byte address.
thank you
Show Lesshi. i need your help.
i tested some our company's product with cypress fram.
i checked cypress fram's spec.
FM24V02A-GTR spec | tested data | |||||
min | max | unint | 測定値 | |||
Fscl | - | 1 | MHz | 199.005 | kHz | |
Thigh | 260 | - | ns | 2.42 | us | |
Tlow | 500 | - | ns | 2.42 | us | |
Tr | - | 120 | ns | 130 | ns | NG |
Tf | 20(vdd/5.5v) | 120 | ns | 25 | ns | |
Thd:sta | 260 | - | ns | 1.08 | us | |
Tsu:sta | 260 | - | ns | |||
Thd:dat | 0 | - | ns | 130 | ns | |
Tsu:dat | 50 | - | ns | 1.93 | us | |
Tdh:dat | 130 | ns | ||||
Tsu:sto | 260 | - | ns | 1.38 | us | |
Taa | - | 450 | ns | 520 | ns | NG |
Tbuf | 500 | - | ns | 139.75 | us | |
Tsp | 0 | 50 | ns | 0 | - |
then, Tr and Taa is out of spec.
i think, it is ok . because Fscl is 200kHz.
are you guys also think it is ok?
Show LessHi,
Pls say what about the Ramtron parts? Should I use the Ramtron or Cypress datasheet? (FM24CL64-S)
Should not be there the 1-pin marker?
Best Regards
Paolo
Show Less
Hello,
Regarding the current consumption of the nvSRAM, the temperature condition is 25 ° C in the data sheet, is there a calculation formula or graph of consumption current at + 50 ° C and - 20 ° C?
MPN : CY14B104K - ZS45XIT
Best Regards,
Naoaki Morimoto
Show Less