Non Volatile RAM (F-RAM & NVSRAM) Forum Discussions
Hi,
Would like to know more about the device structure of CY15B104Q F-RAM.
Is it a 2 die or single die IC?
What process is used for the die/dies ? (e.g. TI's 130nm , IBM 180nm , etc. )
Is it structurally similar to FM25W256 /FM33256?
Thanks.
Regards,
SX Pang
Show LessWe are using a CY15B102Q-SXE connected to the SPI bus of a Texas Instruments SM320F2812PGFMEP in an aerospace project.
Sometimes on startup, when verifying the memory content there are zeroes and sometimes a few ones in the first ~200 bytes, this is not what is expected.
The code has been reviewed and do not seem to perform other writes than what's intended, writes are always verified by a read back.
This has happened seven times on three different units during the last years testing but we're not able to reproduce it for more troubleshooting, it seem to happen at random.
Are there any known issues with the memory or has this occurred to someone else?
Best regards
Johan
Show LessHi,
From the datasheet, it indicated that FM33256B is logically separated between its FRAM and Integrated Processor Companion portion.
Anyone knows if the silicon die inside is separated too ? i.e. 2 silicon dies on common package. ?
If they are separated, are both dies made using the same process technology ? (I read somewhere the FRAM portion was made by TI's 130nm process. )
And if they are made on the same /die, would an error on the Integrated Processor Companion portion affects the FRAM portion and vice versa ?
Lastly, by any chance is the FM33256B radiation harden ?
Thanks in advance !
Regards,
SX Pang
Show LessIs there a preferred landmark design available for the 8-pin GQFN of the Excelon LP F-RAM?
Hello Everybody,
Does anybody know whether I2C FRAM FM24CL64B (and other I2C FRAM chips) support reading of Manufacturer ID and Device ID as it is described in
NXP UM10204 I2C-bus specification and user manual, Rev. 6 — 4 April 2014, Section 3.1.17, p.20 ?
Thanks to All,
Pavel
Show LessHello,
regarding parallel FRAM devices, I wonder if there is a specified maximum CE# low time.
To be specific, in the FM18W08 device datasheet the following statement can be found (Pg4, Pre-Charge Operation):
"The user determines the beginning of this operation since a pre-charge will not begin until CE rises. However, the device has a maximum CE LOW time specification that must be satisfied."
So far I was not able to find a value or any other mentions of this parameter in the datasheet.
I did some tests and the device didn't seem to mind CE# low time intervals of couple hundred milliseconds or so, but I would like to be on the safe side. My usage scenario would involve an educational system in which components must operate in a static way, bus signals set by user through manual switches for example. This means that the bus could be in any one state for an indefinite amount of time, and obviously that is a concern for the FRAM if cited limit exists.
In the case this turns out to be a real issue with this and other parts in its product family, I would like to ask whether the FM28V020 device has the same restrictions, as it is said to be able to operate as a drop-in replacement for SRAM, which are by definition fully static.
Thanks.
Show LessI want to know the recommended land pattern for FM24CL16B-DGTR.
KBA225416 has the recommended land pattern for 8pin-DFN.
Land Pattern Recommendations for Commonly Used Cypress Packages – KBA225416
However, the package size of FM24CL16B-DGTR is different from 4x4.5x0.75.
(the package size of DFN in KBA is 5x6x0.75)
I think KBA information is not usable. Is it correct?
If correct, please provide the recommended land pattern information for FM24CL16B-DGTR.
Thanks.
Show LessCheck out this upcoming webinar from our partner, Arrow Electronics!
Advances in factory automation are requiring more from devices. Factories are integrating more functionality such as enhanced process control with expanded communication options including wireless, enabling more local data acquisition and storage, as well as implementing system consolidation to lower cost and complexity wherever possible. With performance and reliability being key design parameters in these advanced factory automation applications – Cypress is the supplier of choice with the ideal nonvolatile memory, MCUs, and wireless technologies to meet these demands. Join Cypress and Arrow for an informative webinar on the nonvolatile memory, microcontrollers, and world-class wireless technology from Cypress that enable the factory automation systems of tomorrow.
Date: Wednesday November 13th, 2019
Time: 10:00 AM PST
Agenda:
- Cypress nonvolatile memory product offering for factory automation
- Cypress MCU and Wireless product offering for factory automation
- Cypress factory automation system-level solution
- Cypress factory automation use cases
- How to get started and resources
Show Less
We have been using the FM25W256 for a while and we recently noticed that on some boards some of the memory addresses cannot be accessed properly.
We are using SPI mode 0 at 5MHz clock.
For example if I try to read or write address 0x00A4 I ended up reading or writing address 0x00A0, we noticed that happening also with other addresses like 0x00B4 and 0x00B0, it seems to be like the IC is always disregarding the last three bits of the address (I did scope the SPI and our device is requesting the proper address location)
We suspect something with the hardware as this code has been working for a while now. This is the circuit:
where all the signals go to our microprocessor. Is there something wrong for the resistors or capacitors that we are missing?
Thanks for the help
Show Less