Has the FM25V02A or similar FRAM device been tested for EMI environments like RS103 up to or beyond levels of 20,000 V/m?
We are experiencing issues where even though the system is configured to not write to the device, the first few addresses (0,1,2,3) are changing value when exposed to a radiated field at high levels.Show Less
I patched the linux-5.4.40-cy-spimem.patch to TI provided SDK.
And I modified the device tree like below,
pinctrl-names = "default";
pinctrl-0 = <&main_spi0_pins_default>;
ti,pindir-d0-out-d1-in = <1>;
compatible = "cy-spimem", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
#data-size = <16>;
But the spi speed is not 40Mhz as expected. Please help to point out how to set the spi speed in device tree for FRAM?
Current Infineon website have something wrong of CY15E064J-SXE data.
The link datasheet download is CY15E064J-SXA not CY15E064J-SXE.
And this parts support 5V, but parts sorting at 3.3V.
So, please help provide CY15E064J-SXE datasheet for reference.
I want to use FM31256-G with external generator.
I have built a test schematic (please look at the attachment).
So when i'm disabling 5V source i observe too high current flow through the R1 resistor and Supercap C2 is discharging very quickly. I've measured the current through R1 and it was about 700uA when C2 was fully charged.
I've made an experiment and disconnected X1 and X2 from D3 and D4. After that current trough R1 became about 3 uA.
So i observe high current consumption only when external generator is connected to FM31256-G.
Do you have any ideas how to solve that?Show Less
I'm trying to use the cy14v101qs model more precisely the cy14v101xs_ncvlog.vp.
In the config.v file the following defines are set:
`define PKG_16SOIC 1
In the log file I have the following messages from the memory:
INFO >> 5 ns >> TB_top_HQSPI_V400.i_cy14v101xs.i_up_mem
Power On Reset seen.
[150 ns ns] ==INFO== Power up: device fully accessible.
[150 ns ns] ==INFO== Protocol selected is extended
[150 ns ns] ==INFO== 3-byte address mode selected
[150 ns ns] ==INFO== Bottom 128M selected
The problem is that I can't get the vendor ID.
I send in SPI mode the command 0x9F (get ID) but I don't get any response from the memory.
I tried with 0x9E (fast get id) with the same result.
Did I do something wrong?
Thanks in advance for your help.
We've been using your CY14E256LA-SZ45XI in our PCB designs for many years now and it's been a great and reliable part for us. Unfortunately, we've gotten the same bad news that others in this forum have posted about in that the part is going obsolete and there are last time buys being accepted up until Dec of 2022.
We presently use it with a 5V 8051 microcontroller.
Do you have any recommendations for a replacement part, even if it's not pin compatible?
We see many parts out there, but most are 3.3V compliant.
We thought that your "FM1808B-SG" FRAM would effectively be a drop in replacement (with a minor board layout change). However, a further inspection of its data sheet indicates that each memory access must have a separate strobe of the chip enable line.
Looking at an analyzer capture of our present design, our 8051 will keep the chip enable low (top row signal) for consecutive writes to different memory locations:
Based on this plot and your FRAM data sheet, I assume I'm reading it correctly at that the "FM1808B-SG" would not be compliant with our 8051 memory control timing?Show Less
In the CY14B256LA data sheet under maximum device ratings on page 8 there is a maximum accumulated storage time:
Maximum accumulated storage time:
At 150 °C ambient temperature .......................1000 h
At 85 °C ambient temperature ..................... 20 years
Are these limitations against the non-volatile storage of data or is this with respect to the useful life of the component?Show Less
Does anyone have radiation test data on FRAM CY15B102Q (e.g. full part number CY15B102Q-SXM or similar) or on this part family? Looking for gamma “total irradiation dose (TID)” or “single event effects (SEE)”/heavy ion test results.Show Less
We are using CY14B116N-Z30XI nvsram in a pcmcia memory card.
The CY14B116N-Z30XI connects to a AGLP125 which generates the control signals for the nvsram and the pcmcia bus. The WE pin is pulled up by a 10k resistor and there's a 22uf cap on the VCAP pin. When the card is power cycled some cards unintentionally change data in the nvsram without any writes from the processor. The datasheet for the CY14B116N-Z30XI describes the autostore function and how to disable it using software read command sequences. The FPGA was updated to drive HSB high by default instead of just during read/write operations, with only a weak pull-up in the nvsram otherwise. Does it make sense that driving HSB high by default would eliminate corruption in the nvsram since HSB is active low and why? If this this change doesn't fully solve the problem we could look at creating a FSM in the FPGA to create the autostore disable sequence.
Regarding the FRAM reset method, it seems that there are two methods, hardware reset / software reset, but please give us information on each reset condition.
MPN: FM24V02A-GTRShow Less