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Non Volatile RAM (F-RAM & NVSRAM) Forum Discussions

NaMo_1534561
Level 5
Level 5
100 replies posted 100 sign-ins 50 replies posted

Hello,

Several I2C EEPROMs have a software reset sequence.

When the power-on EEPROM falls into an incorrect state (due to excessive bus noise, etc.)

or when the microcontroller is reset during communication.

In such a case, the serial EEPROM device can reset correctly by sending the following sequence.

• Start bit

• 9-bit "1" clock

• Start bit

• Stop bit

Is it possible to perform a software reset also in FRAM of Cypress?

Best Regards,

Naoaki Morimoto

1 Solution
Anonymous
Not applicable

Hi,

I kindly request you to refer to one of our Application Note from this link below:

http://www.cypress.com/file/195656/download

As mentioned in the Application Note, in Table 4, page 6, I2C F-RAM does not require this feature.

However if implemented, it will have no impact on the device operation.

Thanks,

Nada

View solution in original post

1 Reply
Anonymous
Not applicable

Hi,

I kindly request you to refer to one of our Application Note from this link below:

http://www.cypress.com/file/195656/download

As mentioned in the Application Note, in Table 4, page 6, I2C F-RAM does not require this feature.

However if implemented, it will have no impact on the device operation.

Thanks,

Nada