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CY14B116L is used for nvram in controller board.
I met incorrect operation in CY14B116L chip.
My test procedure is as follows:
1. Power on
2. clear all area of CY14B116L into 0x0
3. Confirm the contents of CY14B116L is 0x0 in whole area.
4. Execute memory test for SRAM in controller board.
Data pattern for SRAM memory test is 0xaa or 0x55.
During SRAM memory test, the program does not access the address space of CY14B116L.
5. After memory test for SRAM, I check the contents of CY14B116L.
6. In that case, contents of CY14B116L is not 0x0 in whole area.
Incorrect data is shown in whole area of CY14B116L.
Incorrect data pattern is starting 0x0, by increasing +1, upto 0xff repeatedly.
for example,
0x05000000: 0001 0203 0405 0607 0809 0a0b 0c0d 0e0f
0x05000010: 1011 1213 1415 1617 1819 1a1b 1c1d 1e1f
..... ........ feff 0001 0203 .....
.......
0x05010000: 0001 0203 0405 0607 0809 0a0b 0c0d 0e0f
Would you explain why this operation is occurred?
Or what is the condition to generate the above incorrect data writing in CY14N116L ?
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I found the source of incorrect data shown in whole area of CY14B116L.
The incorrect data is the test pattern ("0001 0203 0405 0607 .....") for memory test, write, read and check operation, of CY14B116L itself.
After memory test and power off, test pattern is stored in nonvolatile area of CY14B116L.
Maybe the reason of showing the incorrect data in CY14B116L is to transfer nonvolatile information into SRAM of CY14B116L.
I suppose that during normal operation , in CY14B116L, RECALL operation is initiated abnormally.
So data in nonvolatile information("0001 0203 0405 0607 0809 .....") is transferred into the SRAM of CY14B116L.
In CY14B116L, RECALL cycle must be executed by the power-on or software address sequence.
In datasheet, RECALL is initiated when Vcc again exceeds the Vswitch on power-up.
Now we are debugging why RECALL operation is initiated abnormally during the normal operation.