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Non Volatile RAM (F-RAM & NVSRAM) Forum Discussions

NaMo_1534561
Level 5
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Regarding the FRAM reset method, it seems that there are two methods, hardware reset / software reset, but please give us information on each reset condition.

 

MPN: FM24V02A-GTR

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MAO
Level 4
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Level 4

The reset condition for FM24V02A-GTR is that the I / F of FM24V02A is I2C and there is no reset (soft / hard).

 

-The waiting time required for FRAM to become accessible after Power ON.

First access from power-up VDD (min) (START condition) 250 --μs

-Waiting time from the completion of access to FRAM to the ability to power down

Last access (STOP state) to power down (VDD (min)) 0 --µs

-The waiting time required from when the sleep mode is released until the FRAM becomes accessible.

Wake time from sleep mode --400 µs

-At the time of power-up, it is necessary to satisfy tPU and tVR on page 14 of the data sheet.

At power down, tVF must be met.

 

Please refer to page 14 of the data sheet below for details.

https://www.infineon.com/dgdl/Infineon-FM24V02A_256_Kbit_(32K_8)_Serial_(I2C)_F_RAM-DataSheet-v10_00...

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MAO
Level 4
50 questions asked First solution authored 50 sign-ins
Level 4

The reset condition for FM24V02A-GTR is that the I / F of FM24V02A is I2C and there is no reset (soft / hard).

 

-The waiting time required for FRAM to become accessible after Power ON.

First access from power-up VDD (min) (START condition) 250 --μs

-Waiting time from the completion of access to FRAM to the ability to power down

Last access (STOP state) to power down (VDD (min)) 0 --µs

-The waiting time required from when the sleep mode is released until the FRAM becomes accessible.

Wake time from sleep mode --400 µs

-At the time of power-up, it is necessary to satisfy tPU and tVR on page 14 of the data sheet.

At power down, tVF must be met.

 

Please refer to page 14 of the data sheet below for details.

https://www.infineon.com/dgdl/Infineon-FM24V02A_256_Kbit_(32K_8)_Serial_(I2C)_F_RAM-DataSheet-v10_00...

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