Jan 31, 2022
06:40 PM
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Jan 31, 2022
06:40 PM
Is it possible to simulate access to FRAM even if FRAM is not installed by using the above?
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Jan 31, 2022
07:57 PM
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Jan 31, 2022
07:57 PM
Hi @MAO,
Yes, you can simulate a Verilog model and check its operations even if a FRAM is not installed.
Thanks,
Ritwick
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