FM28V202AVERILOG simulation model

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MAO
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Is it possible to simulate access to FRAM even if FRAM is not installed by using the above?
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Ritwick_S
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Hi @MAO,

 

Yes, you can simulate a Verilog model and check its operations even if a FRAM is not installed.

 

Thanks,

Ritwick

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Ritwick_S
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100 solutions authored 25 likes received 250 sign-ins

Hi @MAO,

 

Yes, you can simulate a Verilog model and check its operations even if a FRAM is not installed.

 

Thanks,

Ritwick

MAO
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Distributor - Macnica (Japan)
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As an additional question, can this simulation model be used for software development such as driver development?

We would also like to develop a driver to control FRAM in advance if possible.

For example, control the FRAM control IP in the FPGA from the driver, access the virtual FRAM (FM28V202A.v), write, read, etc.

If we can confirm the operation similar to using actual FRAM, we would like to utilize it for driver development.

I'm guessing that it's difficult to use it for anything other than IO timing verification, but I'd like to confirm it just in case. 

 

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Ritwick_S
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100 solutions authored 25 likes received 250 sign-ins

Hi @MAO,

 

As you can confirm the operations using it, you can use it for driver development as well.


Thanks,
Ritwick

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MAO
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Distributor - Macnica (Japan)
5 solutions authored 50 replies posted 100 sign-ins

This is an additional question. Thank you.

I think that the actual FM28V202A has a capacity of 2Mbit, but even in the simulation model

Is it possible to simulate full area access for 2Mbit?

 

If you use a simulation model, please let us know if there are any restrictions on driver development.

(For example, access to a specific area can only be simulated, etc.)

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MAO
Level 5
Level 5
Distributor - Macnica (Japan)
5 solutions authored 50 replies posted 100 sign-ins

Thank you

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