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- We used FM22L-16-55-TG. The control chip matched is 10M08SCE144I7G. During use, it was found that the data written to FM22L-16-55-TG had been accidentally tampered with when switching the power back on after powering off.
- Process: write data in working status "write" - > read data "read" confirm no problem -- > power off -- > power on -- > read data "read". In this process, we tested on 10 products. Some data were tampered at the first power on, and some were tampered after 20-30 power on. The phenomenon was random, but always occurred.
3.At first, we suspected that the software would cause errors when automatically operating the FRAM chip. So we modified the software to forcibly lock the write operation "write", but it seemed useless.
- We tested the products in 2001、2025、2031 batches of this chip, and the errors happened again.
I would like to know the detailed reason why this phenomenon occurs and please kindly figure out if those errors were caused by the problem of hardware or the defect of software.
5.schematic diagram
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Solved! Go to Solution.
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Hi
Please note that if CE and WE are both LOW during power cycles, data will be corrupted which is what you are observing. Is there any reason why the WE and CE have so many glitches (even though pull ups are there).
What you can try is to change the pull resistance from 2K to 10K ohm and see if this phenomenon continues.
Thanks,
Pradipta.
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Hi
1) Can you provide us the power up and power down waveform. We would also like to confirm the tVR and tVF spec as per the datasheet that can lead to this issue.
2) What is failure rate you are observing
3) Can you pass us the top marking of the chips that are failing. ( A photo of top will do). If you have passing chips as well please one top marking photo for that as well.
Thanks,
Pradipta.
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Dear
Pls refer to the following answer which highlighted in blue
1) Can you provide us the power up and power down waveform. We would also like to confirm the tVR and tVF spec as per the datasheet that can lead to this issue.
Sorry,we cannot provide software timing because we are not software writers.
2) What is failure rate you are observing
Almost 100%
3) Can you pass us the top marking of the chips that are failing. ( A photo of top will do). If you have passing chips as well please one top marking photo for that as well.
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Hi Jane,
1) We checked the schematics attached here. They look fine. (You can ground the BHE as well since you are not using the x8 config). It does not look like a hardware issue to us and looks like software error.
2) We will need the power up and power down waveforms for the device as we believe that some timing spec may be getting violated in power cycle which is leading to these errors. Could you ask your software team to provide us with this data.
Thanks,
Pradipta.
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Dear Pradipta.
Pls refer to the following feedback
1.Picture1 is the waveforms of /WE and /CE when powerdown
Blue Line:/WE Yellow Line:/CE
2. Sometimes,when powerdown,it appeared the abnormal waveform like picture2 then appeared normal waveform
when shorten the time from 10ms to 200us,the waveform like below
3.When Powerdown
Yellow Line:VDD Blue Line: /WE
4.When Powerup
Blue Line:/WE Yellow Line:/CE
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Dear
Pls refer to the following feedback
1.Picture1 is the waveforms of /WE and /CE when powerdown
Blue Line:/WE Yellow Line:/CE
2. Sometimes,when powerdown,it appeared the abnormal waveform like picture2 then appeared normal waveform
when shorten the time from 10ms to 200us,the waveform like below
3.When Powerdown
Yellow Line:VDD Blue Line: /WE
4.When Powerup
Blue Line:/WE Yellow Line:/CE
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Hi
Please note that if CE and WE are both LOW during power cycles, data will be corrupted which is what you are observing. Is there any reason why the WE and CE have so many glitches (even though pull ups are there).
What you can try is to change the pull resistance from 2K to 10K ohm and see if this phenomenon continues.
Thanks,
Pradipta.