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We've been using your CY14E256LA-SZ45XI in our PCB designs for many years now and it's been a great and reliable part for us. Unfortunately, we've gotten the same bad news that others in this forum have posted about in that the part is going obsolete and there are last time buys being accepted up until Dec of 2022.
We presently use it with a 5V 8051 microcontroller.
Do you have any recommendations for a replacement part, even if it's not pin compatible?
We see many parts out there, but most are 3.3V compliant.
We thought that your "FM1808B-SG" FRAM would effectively be a drop in replacement (with a minor board layout change). However, a further inspection of its data sheet indicates that each memory access must have a separate strobe of the chip enable line.
Looking at an analyzer capture of our present design, our 8051 will keep the chip enable low (top row signal) for consecutive writes to different memory locations:
Based on this plot and your FRAM data sheet, I assume I'm reading it correctly at that the "FM1808B-SG" would not be compliant with our 8051 memory control timing?
Solved! Go to Solution.
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Hi @aporsch ,
We do not have drop in replacement for the part "CY14E256LA-SZ45XI", but we have Next best alternative part "CY14B256LA-SP45XI". For that, please check the document attached below.
CY14B256LA-SP45XI having operating voltage 3V, so you need to use LDO for that reason. The packaging used for the same is 48-Pin SSOP .
For FRAM "FM1808B-SG" you are correct you have to follow the data sheet specification for FRAM design consideration . and according to it you need each memory access must have a separate strobe of the chip enable line.
Thanks,
Shubham Desai
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Hi @aporsch ,
We do not have drop in replacement for the part "CY14E256LA-SZ45XI", but we have Next best alternative part "CY14B256LA-SP45XI". For that, please check the document attached below.
CY14B256LA-SP45XI having operating voltage 3V, so you need to use LDO for that reason. The packaging used for the same is 48-Pin SSOP .
For FRAM "FM1808B-SG" you are correct you have to follow the data sheet specification for FRAM design consideration . and according to it you need each memory access must have a separate strobe of the chip enable line.
Thanks,
Shubham Desai
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Shubham,
Thank you for the quick reply.
We're also investigating modifying our 8051 memory lines to potentially accommodate the chip enable strobe requirements.
I also see the FM1801BSG is not on the list. From Infineon's perspective, do you plan on continuing to produce this chip for several years to come? I ask simply trying to avoid another re-design of our PCBs if this FM1801BSG chip is going EOL say, next year.
Also, can you provide some insights as to typical lead times for this chip? 10, 20, 40, 90 weeks?
Thank you.
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Hi @aporsch ,
We are not having product that you mentioned "FM1801BSG", please verify once and if if you have datasheet please share the same with us.
Thank You,
Shubham Desai
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Sorry about that, typo on my part.
It was the "FM1808B-SG" I mentioned in my first post.
https://www.infineon.com/cms/en/product/memories/f-ram-ferroelectric-ram/fm1808b-sg/