Sep 29, 2021
12:30 AM
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Sep 29, 2021
12:30 AM
Does the WDTRIG bit need to be inverted when changing non WD settings in GENCTRL1 register?
The WDTRIG bit must be inverted every time the GENCTRL1 register is written. Otherwise fail-safe mode is entered. This applies even if the bit settings being written do not affect the WD. I.e., if changing the current sense amplifier (CSA) gain setting CSAG1, the WDTRIG bit must still be inverted when the write occurs.
The WDTRIG bit must be inverted every time the GENCTRL1 register is written. Otherwise fail-safe mode is entered. This applies even if the bit settings being written do not affect the WD. I.e., if changing the current sense amplifier (CSA) gain setting CSAG1, the WDTRIG bit must still be inverted when the write occurs.
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- IFX
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