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Mac_Kurosawa
Level 4
Level 4
Distributor - Macnica (Japan)
10 solutions authored 5 solutions authored 10 replies posted

In the "TLE6208-3G" Application Note, Rev. 1.0, July 2004, on page 20, in the description of the "Status Word" section, regarding "Bit 0: Overtemperature Prewarning," it is understood that when the chip temperature falls below the standard value (Ti=125°C), bit 0 is set to L to update the abnormal bit based on the IC's own temperature judgment.

Therefore, it is correct to understand that for "Bit 13: Overload/Short-Circuit Indicator," "Bit 14: Underload/Broken Wire Indicator," and "Bit 15: Supply Voltage Fault," when the abnormal condition is resolved, the abnormal bit is not automatically cleared, but by using the SRR register, the abnormal bit can be set to 0.

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Sahil_K
Moderator
Moderator
Moderator
25 likes received 250 replies posted First like given

Hi @Mac_Kurosawa ,

Yes, your understanding is correct that even after the fault conditions are cleared, bits 13, 14, and 15 will not be automatically cleared if SRR is set to L. In order to reset the status register, you will need to set SRR to H and initiate a new control/programming cycle

Best Regards,
Sahil Kumar

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Sahil_K
Moderator
Moderator
Moderator
25 likes received 250 replies posted First like given

Hi @Mac_Kurosawa ,

Yes, your understanding is correct that even after the fault conditions are cleared, bits 13, 14, and 15 will not be automatically cleared if SRR is set to L. In order to reset the status register, you will need to set SRR to H and initiate a new control/programming cycle

Best Regards,
Sahil Kumar

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