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Mac_Komatsubara
Level 3
Level 3
Distributor - Macnica (Japan)
5 replies posted First solution authored 25 sign-ins

Ground Reference is described on p.8 of "BTN7030-1EPA Design and PCB guideline Application Note" of the BTN7030-1EPA application note.

Is it correct to understand that if the peripheral passive elements are arranged as shown in Figure 10 and the signal GND and power GND are connected, no potential difference occurs between the two GNDs in the motor drive application?

For example, if a potential difference of 2V is assumed to occur between Signal GND and Power GND, can the potential difference be eliminated by the configuration shown in Figure 10? Please let me know if there is any problem.

 

Regards,

Komatsubara

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1 Solution
RupakC
Moderator
Moderator
Moderator
100 solutions authored 250 sign-ins 25 likes received

Hello @Mac_Komatsubara 

Based on the Figure that is shared, PGND and SGND should have no voltage deviation. If the board designer chooses to directly connect the two grounds, then the voltages should be equal. However, the board designer may always decide to use filters to limit the high frequency components from flowing to the other side.  We recommend to minimize the ground shift by implementing appropriate filters using Csense and Rsense.

In any case, we do not recommend a board design where the voltage difference between the two grounds will be maintained at 2V. Such a voltage difference is too high and may need further inspection into the board design. 

Regards

RupakC

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RupakC
Moderator
Moderator
Moderator
100 solutions authored 250 sign-ins 25 likes received

Hello @Mac_Komatsubara 

Based on the Figure that is shared, PGND and SGND should have no voltage deviation. If the board designer chooses to directly connect the two grounds, then the voltages should be equal. However, the board designer may always decide to use filters to limit the high frequency components from flowing to the other side.  We recommend to minimize the ground shift by implementing appropriate filters using Csense and Rsense.

In any case, we do not recommend a board design where the voltage difference between the two grounds will be maintained at 2V. Such a voltage difference is too high and may need further inspection into the board design. 

Regards

RupakC
0 Likes