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①IN Register 0CH,field 3:2 is called fm_osfb,which means"output stage feedback failure behavior". Question is :how to understand feedback failure in real application scenarios?
② how understand high-side and low-side?
③what is ART mode?
Solved! Go to Solution.
- Labels:
-
ispn:60501:1:0
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l1:144:1:0
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l2:1244:1:0
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Hi,
Thanks for using Infineon community.
1. First failure detection, then failure reaction, and then Error Handling. In real scenarios, for example, drain-source overvoltage, over temp., braking happened, all these failure can be detected by chip, chip gets the error message, then react according to the failure.
2. In a half bridge, the upper mosfet is high-side mosfet. the lower mosfet is low-side mosfet.
3. Do you mean UART mode? UART can be used in four different modes. Details description please see datasheet.
Thanks and BR
Steven
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Hi,
Thanks for using Infineon community.
1. First failure detection, then failure reaction, and then Error Handling. In real scenarios, for example, drain-source overvoltage, over temp., braking happened, all these failure can be detected by chip, chip gets the error message, then react according to the failure.
2. In a half bridge, the upper mosfet is high-side mosfet. the lower mosfet is low-side mosfet.
3. Do you mean UART mode? UART can be used in four different modes. Details description please see datasheet.
Thanks and BR
Steven
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question 3 :not mean ART.maybe I have found the meaning of ART. In User_manual,ART means rectification mode?
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Hi,
Could you upload the User_manual in your hand, let me double check.
BR,
Steven
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Yes, you are right.
Steven