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Marso
Level 1
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Hi all,

I have to read the frequency of a square wave around 500kHz (50%).
What's the best way?

Can it be done with the Timer (HAL) by reading the width of the positive part of the wave?

https://infineon.github.io/psoc6hal/html/group__group__hal__timer.html#subsection_timer_snippet_1

Thank you

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Rakesh_BG
Moderator
Moderator 10 likes received 25 solutions authored 50 replies posted
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Hi @Marso ,

You should be able to do it because the default clk frequency is 1MHz,

Thanks,

Rakesh B G

Marso
Level 1
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Ok thanks for your reply,

I used the interrupt on the GPIO to start and stop the count:

void gpio_interrupt_handler(void* handler_arg, cyhal_gpio_event_t event)

if(rise == 1)
{
cyhal_timer_start(&timer_obj);
cyhal_gpio_write(P9_2, 1);

cyhal_gpio_enable_event(P9_0, CYHAL_GPIO_IRQ_FALL, GPIO_INTERRUPT_PRIORITY, true);
rise = 0;
}
else
{
cyhal_timer_stop(&timer_obj);
cyhal_gpio_write(P9_2, 0);

read_val = cyhal_timer_read(&timer_obj);
cyhal_timer_reset(&timer_obj);

cyhal_gpio_enable_event(P9_0, CYHAL_GPIO_IRQ_RISE, GPIO_INTERRUPT_PRIORITY, false);
rise = 1;
}

At this point I believe it is not the timer but the time lost in the interrupt.

Attached are the waveforms for 10kHz and 500kHz.

Is there a way to be faster in starting and stopping the timer?

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Len_CONSULTRON
Level 9
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Level 9

Marso,

How accurate a frequency do you want to measure?

The source frequency to measure is 'around' 0.5 MHz.  Do you need to measure the frequency with a tolerance or do you just need to detect the presence of 'about' a 0.5 MHz input?

For example if you want to measure a frequency of 0.5 MHz with +/- 10% tolerance you need a input decimation clock to the timer at least 10x the measurement frequency.  This means the Timer input clock needs to be  0.5 * 10 MHz = 5 MHz.

The best way to measure the frequency with the Timer is to use the Capture input.  This uses the HW of the Timer to capture the Timer at the input signal transitions with virtually no latency.

Using a CPU interrupt to read the counter has unpredictable latencies. which at a fast Timer clock can mean extra counts.

Len
"Engineering is an Art. The Art of Compromise."
Marso
Level 1
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Thanks for your reply.

>>> How accurate a frequency do you want to measure?
10% is fine.

I am new to using ModusToolbox, is there an example of how to use the timer capture input?

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Len_CONSULTRON
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Marso,

My preferred tool is PSoC Creator.

Hopefully someone else can provide a useful Timer Capture example.

Len
"Engineering is an Art. The Art of Compromise."
Marso
Level 1
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PSoC Creator versus Modus Toolbox is obsolete? 

I don't see some PSoC62s in the PSoC Creator 4.4 device selector.

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ETRO_SSN583
Level 9
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Following done in Creator.

 

Here is one method, used in stretching a regenerated pulse train -

 

ETRO_SSN583_0-1655578395120.png

You would have to raise clock, say to 24 Mhz, so you can oversample the

incoming waveform. Its resolution kind of poor, at 500 Khz thats a count  of

48, so res is ~ .5 Khz

 

Another method used to get duty cycle and period (same limits as above)  -

 

ETRO_SSN583_1-1655578782765.png

 

The advantage of above two methods is relatively low latency to result.

 

If you want hi res then you use a gate, 1 sec for 1 Hz res, but latency becomes

essentially the gate period.

 

Note above projects you have to look at max counting rate for counter components.

May force you to use ripple counter component, not UDB, or use a Verilog solution.

The non UDB basic counter clocks at -

 

ETRO_SSN583_0-1655580360219.png

 

 

Maybe the 74HC user community library component would be faster.

https://cypresscomstg.prod.acquia-sites.com/validated-components

 

Regards, Dana.

 

 

 

 

Marso
Level 1
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Thanks for your reply,
it would appear that the PSoC62 I use is not supported by PSoC Cretor.

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Len_CONSULTRON
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Marso,

...


it would appear that the PSoC62 I use is not supported by PSoC Cretor.


Regretable.   I've looked used MTB whether there are any examples of Timer Capture examples from Infineon.  No luck.   Someone outside of Infineon may have an example they can provide.

Any volunteers?

Can you provide the PSoC62xxx part you plan to use?   

Also, have you committed GPIO assignments yet?   Hopefully not.  This would provide the best solution to a volunteer for a solution.

Len
"Engineering is an Art. The Art of Compromise."
Marso
Level 1
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Len, thanks for the support!

The part is CY8C6244AZI

The committed pins are: 

P2.0 P2.1 P2.2 P2.3 P2.5 P2.7
P3.0 P3.1
P5.0 P5.1 P5.6 P5.7
P6.2 P6.3 P6.4 P6.5 P6.6 P6.7
P9.1

Thank you

 

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ETRO_SSN583
Level 9
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I can supply the project and you can cut/paste the code into modbus project.

Change whats different. The component setup straight forward.

Just a thought.

 

Regards, Dana.

Marso
Level 1
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Ok Dana,
send me the project so I try.

Thank you

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ETRO_SSN583
Level 9
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Here is a standard gated design. 1 Hz resolution. If you change gate to .1s or .01s period you can reduce

the size of the gate logic hence saving resources but dropping resolution.

 

Because of the gate period of 1s that means latency to measurement is worst case

2 sec, as the source is a 2 Hz signal, high time used for gate. That can be cut by using

a PWM to develop 1s + a few additional clocks instead of the 1s low time of the 2 Hz.

Cut even further if you use 10, 100, 1000 Hz as gate, but resolution suffers proportionally.

 

I used the DDS for the test source.

 

Note you have to add the dependency to the DDS24 in order for it to compile. Or delete

it off schematic and hook up a pin in its place to the freq source you want to measure.

 

ETRO_SSN583_0-1656447324569.png

 

I also have reciprocal counter designs, but they are really intended for very low freq measurement.

Otherwise their resolution at 500 Khz very poor.

 

Attached DDS project and freq cntr project

 

Regards, Dana..

 

 

ETRO_SSN583
Level 9
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Found one error. User is limited to setting in counter dialog period to a minimum of 1,

but further reading of data sheet states clearly counter on reset/start,

starts at 0. I had been subtracting one in ISR when I read capture register,

so eliminated that mis- correction.

 

I also added LCD to display freq as a debug aid.

 

If I get time I will add USBUART to it for a PC interface.

 

 

Regards, Dana.