About Sense clock source of PSoC 4100S MAX CSD in Modus Toolbox2.2.2

[YoIs_1298666]

Hello,

If we look at the Sense clock source of PSoC 4000S CSD in Modus Toolbox2.3, we can select the figure below.

On the other hand, the Sense clock source of PSoC 4100S MAX CSD in ModusToolbox2.2.2 is set as shown in the figure below. Is it not possible to select the number of bits for PRS and SSC? Or is it still unimplemented?

Best regards,

Yocchi

[Hari]

Hello @YoIs_1298666 

The MSCV3 block uses a different approach to set the PRS bits. Currently, it defaults to the value 12 - that is, PRS 12 is chosen. The option to change the sequence bits is currently not available. 

Best regards, 
Hari

[YoIs_1298666]

Hello Hari-san,

Thank you very much for your reply.

What is the number of bits in SSC?

Please tell us the schedule of variations of SSC.

Best regards,

Yocchi

[Hari · Accepted solution]

Hello Yocchi-san, 

Even the SSC follows a similar approach. It defaults to 12 bits currently and the option to change this is not available at this time.

Best regards, 
Hari

[YoIs_1298666]

Hello Hari-san,

Thank you very much.

Best regards,

Yocchi