Microcontrollers Forum Discussions
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PSoC™ 6
Discussion forum regarding PSoC™ 6 - 32-bit Arm Microcontroller (MCU) Forum, discusses the 40-nm technology - best combination of ultra-low-power consumption, flexibility, security and high-performance topics.
PSoC™ 4
PSoC™ 4 - Arm®-based Forum, discusses the low-power Cortex®-M0 and Cortex®-M0+ cores, CapSense®, and Bluetooth® Low Energy
PSoC™ 5, 3 & 1
The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.
CAPSENSE™ & MagSense
The Sensing Technology Forum discusses CAPSENSE™ - capacitive-sensing and MagSense inductive-sensing for consumer, industrial, automotive, and Internet of Things (IoT) applications.
XMC™
AURIX™
In this forum you can post your questions, comments and feedback about the 32-bit AURIX™ TriCore™ Microcontroller. The AURIX™ offers the highest scalability in performance, memory & peripherals across application. It is a safe and secure companion chip, meeting both the ISO functional safety standards and EVITA full security standards. Here you can also find the links to the latest board pages, SW and Tools GitHub, trainings, documents and FAQs
TRAVEO™ T2G
Discussion forum regarding 32-bit TRAVEO™ T2G Microcontroller - based on ARM® for automotive body electronics applications; cutting-edge performance, safety, and security features topics.
MOTIX™ MCU
The MOTIX™ MCU forum is designed for you to post your questions, comments and feedback about the famous Embedded Power ICs at anytime. Ask your technical questions or explore existing content!
Legacy microcontrollers
Featured Discussions
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Hello:
We have been using CY8CMBR3002 in many projects and for several years. However recently all Cyress distributors have no CY8CMBR3003 in stock and we have trouble to source it and cant deliver to our customers. Is CY8CMBR3002 is EOL or just out of stock? Please help us find the distributor or provide replacement.
Thanks.
Chang Cao
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Hey,
i read the thread "XMCFlasher cannot find the emulator" but can´t replay to this (because it´s marked as solved?!)
How i can setup the J-Link driver for XMC Flasher correct?
I am using the latest version of XMC Flasher (installed over developer Center).
best regards
Andi
Show LessHello,
I have implemented the CY8C4147AXI-S455 on a board and use the I2C bus on pin 18,19 as a master. This master sends only command to a slave implemented on an Arduino mega board. No read access are performed.
The clock is 100kHz. Pull-up resistors are 4,75k. Both boards are supplied with a common +5V.
As long as I tested I2C messages sent by the master without slave connexion I could see proper signals on data and clock. Of course NACK was detected.
When I connect the arduino board, then no signal are detected : SCL is forced to 0 and SDA forced to 1. No clock and data activity.
Then when I disconnect the arduino board, SCL remains permanently low and SDA high. The bus does not work anymore.
Is the bus definitely out of order? What happened?
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Hello,
I am currently working on a project with classmates that involves using the PSoC 6. We are hooking up the PSoC to a digital-multimeter circuit, the MAX134 chip. The MAX134 uses a bidirectional data bus (4 pins), as well as address lanes to communicate with a microprocessor. We are trying to setup bidirectional pins in our top design, and it seems that whatever status we set to our pins when we write to the MAX134, it never gives up the bus to the MAX134 to return data to us.
How would we give up authority on the bus to the other chip? I've seen information about setting different drive modes for the pins, but I don't know which is best for this application. Thanks.
Hello,
i need to do full erase on S6J334EJEE but i can see such chip in the serial flash prgrammer found here -> https://www.cypress.com/documentation/software-and-drivers/flash-programmer-traveo-family?source=search&cat=software_tools
Is there a newer version or other supported tool that is able to full chip erase in case of secured chip or wrong config (debug wait time disabled so no possible to break and erase it)
Thanks.
Show LessI'm trying to understand, via the Architecture TRM, Registers TRM, and the PDL documentation how the Trigger Mux's connect to the PWM Trigger inputs.
I can see that there are 2 Trigger Mux groups, 2 and 3, that connect into the TCPWM's. It looks like the TCPWMx_GRPy_CNTz_TR_IN_SEL1 register is used to select the trigger source for the START signal to the TCPWM. It looks like I can chose between 139 possible trigger choices per figure 25-3 in the TRM. It seems like I can pick the same trigger for each of the counters I might want to control. I want to understand in more detail what is happening
1) Trigger group 2 vs Trigger group 3, which one is used and where is this documented?
2) There are 28 outputs from those 2 trigger groups. How are they routed to the PWM's, where is this documented in the architecture or where is a register controlling this?
3) I cannot understand Table 29-2 in the TRM, there is no indication of what registers control this "selection"?
The PDL documentation shows that I can use Cy_TrigMux_SwTrigger to software trigger all my TCPWM's to START at the same time, but I am unclear how this occurs without understanding the mux connections from the Trigger mux to the individual TCPWM's. Please help my understanding.
And note, this is for the 6xx4 family which is the Ver 2 style of TCPWM and muxing.
Show LessHello,
using Device configurator and QSPI configurator how could i generate a flashloader for Modbustoolbox of external memory?
does the .c/.h file generated used by the tool or does it generates a .elf file to be downloaded in RAM the case in IAR and MDK-ARM?
Thanks in advance.
Show LessHello
I am using CY8C4245AXI-483. I want to test SRAM using Safety Library AN89056 .
It is working fine but I have a confusion. As SRAM base address is 0x20000000. And CY8C4245AXI-483 has 4 kB SRAM.
While debugging the microcontroller, It tests only up to 0x20000B00. So, It is only testing up to 2816 bytes. and theoretically, it should test SRAM till 4096 Bytes. Kindly guide me where I am making mistakes or suggest me the correct parameters to select to Test full SRAM.
I used the manufacturer's diagrams to make my own PCB, where I integrated the TLC9879 shield and an Arduino NANO, I broke the connections between both devices so that there are no connection problems, check the correct connection of the cables to the J-Link, but when I try to make the configurations indicated by the manufacturer for J-Link Lite I get the error "Could not connect to target" what could be happening?
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TraveoII
UART buadrate Setting
by chandan1995 Jun 19, 2023