Microcontrollers

I changed the device to the new chip, CY8C4125PVS-482:

community.infineon.com/t5/Knowledge-Base-Articles/Changing-the-Target-Device-PSoC-3-PSoC-5LP-in-PSoC-Creator/ta-p/252272

I was previously using  CY8C4245PVI-482. Then, I built the project. Errors resulted.

The first error to fix is the clock speed 48→24 MHz (see imo.png). 
The remaining errors are:

• fit.M0049: Pin guidance unavailable: Resource limit: Maximum number of Macrocells exceeded
• mpr.M0014: Resource limit: Maximum number of Macrocells exceeded
  
  

What does "fit" and "mpr" mean? Is there reference documentation explaining these errors? I never heard of a macrocell before. Is there a generic solution to these errors?

I'm picking up a project and haven't used the Cypress PSOC parts before.  I have two board variants with two different PSOC 4 BLE parts in them: CYBLE-224116-01 and CYBLE-224110-00.  I have an iOS app I need to update to make FW upgrades to these units and it needs to be able to determine which part is being targeted.

My first round of research hasn't turned up how to retrieve a hardware version string from the unit.  I suspect that it is stored as a default characteristic on FW images generated by PSOC creator...but I'm still very new. What's an easy what to do this?

Hello Infineon community!

I finally received my CY8CKIT-059 PSOC5LP. I am a total beginner working with it but I'm looking forward to doing my project with it. 

Accelerometer 832M1-0500:  Supply: 3.3V Sensitivity@80Hz(mV/g)  (X-Y-Z): 3.081-2.534-2.7 Bias Voltage(X-Y-Z): 1.636 1.628 1.659

I'm willing to use the SAR ADC with 12-bit resolution to sample the analog output (60KSPS/channel) of the 3 axes of the Accelerometer. Before the input, I have to filter the signal before with -30dB attenuation at half the sampling frequency.

Can I achieve simultaneous sampling for the 3 axes with the S/H? If not I have to have a minimum sampling of 180KSPS and divide it into 3 to achieve 60KSPS. 

Then, I need to transfer the data of the Accelerometer to an ESP32 with SPI then transmit it wirelessly (UDP) (I think this will be another topic) 

So I have multiple beginner questions. (I think I will receive some replies that I need to read the datasheet😅)

1) Can I use a power bank to power the PSOC using 5V USB? What about the Vref of the ADC (VDDA VSSA etc.) can they be powered internally? If my application is to be battery powered, do you advise me to use a battery instead of the USB powering?

2) Which ADC SAR inputs (pins) do you advise me to use? Can I use the kitprog's and work only with it? Or do I have to involve the target? 

3) I have no idea about how can I filter internally the input. Can you give me some insights? 

4) In the screenshot, I need to check if I forgot something, and ask you what should I put as configuration for the ADC if I power the MCU with USB. Vssa to Vdda? 

The SPI connection and filtering are my next steps, just when I'm sure I'm on the right track

I am sorry for the beginner questions but I'm still learning so I rushed to post a thread to receive advice from experienced people in the field. Feel free to reply even if just to tell me go work on your datasheets or other constructive remarks😂

Thank you, People!

Jad
 

Is it possible for an application to overwrite the factory value of CY_SFLASH_USBMODE_IMO_GAIN_TRIM_REG or other registers in SFLASH, so the PSoC will reboot with the new values stored in SFLASH?

I know that the value of CY_SYS_CLK_IMO_TRIM4_REG can be modified at runtime. However, I have a situation where the PSoC could be updated by a customer to older, existing software. That is why I need to modify the trim value permanently.

Is there maybe some special mode using the MiniProg3 and PSoC Programmer, to write SFLASH registers?

I am upgrading a design from using the Cy8C4246AZI to the Cy8C4248LQI-BL573 or BL583.  In my Cy8C4246 design I have an IR receiver module connected to the wakeup pin P0.7.  Internally this pin is configured as an interrupt (IR_Input) and connected to the capture input of a Timer Counter.  The interrupt is derived.

During normal operation, when I receive an interrupt on this pin I start the timer to measure the pulses so that I can decode the IR signal received.  I also have a storage mode for this device where I use Hibernate and the IR signal is used to wakeup from Hibernate.  I maintained the same external hardware but now I am using the Cy8C4248LQI-BL573 and want to also be able to use the -BL583.  I connected the IR input to the wakeup pin P2.2 but I am not able to compile.  I receive routing errors and if I delete the connection from the pin to the Timer Counter capture input it will compile without errors.

I can't attach my project as it is because it is code for my customer.  I am using PSoC Creator 4.3 with PDL 3.1.1.  Both devices are from the PSoC 4 family so why does it work on the 4200M devices and not on the BLE devices?

I do not have BLE active yet.  I am just getting the existing project running and will incorporate BLE later.  We are upgrading the hardware first because we couldn't buy the Cy8C4246.

thanks,

KIm

I'm using TC397XE for this project where I'm trying to achieve basic Master-Slave communication between two I2C modules of TC397XE. I2C0 as Master and I2C1 as Slave.

I reached the point, where Master sends data, but doesn't receive respond from Slave (which should respond with Acknowledgement - SDA low during 9th SCL positive edge). I'm suspicious about Slave configuration settings, although cannot find the cause of problems. Here is Slave configuration code:

  /************************* I2C Module 1 => SLAVE *************************/
    
  /* Enable access for CLC */
  clearWdtEndinit();
  
  /* Clock enable for I2C1 module */
  I2C1_CLC.B.DISR = 0;              // Enable module
  while( I2C1_CLC.B.DISS == 1 );    // Wait while disabled
  I2C1_CLC1.B.RMC = 1;              // Clock division by 1
  while( I2C1_CLC1.B.RMC != 1 );    // Wait while disabled
  I2C1_CLC1.B.DISR = 0;             // Enable module
  while( I2C1_CLC1.B.DISS == 1 );   // Wait while disabled
  
  /* Configure protocol interrupts */
  I2C1_ERRIRQSM.U = 0;
  I2C1_PIRQSM.U = 0;
  I2C1_IMSC.U = 0;
  
  /* Disable I2C1 module */
  I2C1_RUNCTRL.B.RUN = 0;           // Configuration registers accessible
  
  /* Configure operation options */
  I2C1_ADDRCFG.U = 0;
  I2C1_ADDRCFG.B.ADR = I2C_config.slaveAddress;  // Address is given by this 
                                                 // struct
  I2C1_ADDRCFG.B.TBAM = I2C_config.addressMode;  // 7-Bit Address mode select
  I2C1_ADDRCFG.B.MnS = 0;                      // Module configured as master

  
  /* Configure FIFO settings */
  I2C1_FIFOCFG.U = 0;
  I2C1_FIFOCFG.B.RXFC = 1;     // RX FIFO as flow controller
  I2C1_FIFOCFG.B.TXFC = 1;     // TX FIFO as flow controller
  I2C1_FIFOCFG.B.RXFA = 0;     // RX FIFO Alignment - byte aligned 
  I2C1_FIFOCFG.B.TXFA = 0;     // TX FIFO Alignment - byte aligned
  I2C1_FIFOCFG.B.RXBS = 0;     // Burst size 1 word
  I2C1_FIFOCFG.B.TXBS = 0;     // Burst size 1 word
 
  clearWdtEndinit();
  
  /* Configure PORT settings for I2C_1 SDA/SCL pins*/
  P11_IOCR12.B.PC14 = 0x00;         // SCL input -> P11.14
  P11_IOCR12.B.PC13 = 0x00;         // SDA input -> P11.13
  I2C1_GPCTL.B.PISEL = 0x00;        // PORT-A selected
  
  setWdtEndinit();
  
  /* Enable I2C1 module */
  I2C1_RUNCTRL.B.RUN = 1;      // I2C1 Module enabled - configuration 
                               // registers not accessible

Before Master write sequence, both error and protocol interrupt sources are enabled. Then the packet size is writen to TPSCTRL register and the packet data is writen to TXD register. After that, Master waits until TX_END request is set by PIRQSS register. After that, write sequence ends.

Also during this sequence, after TXD register is being written to, following status is set:  I2C0_BUSSTAT.BS = 2 (busy master), I2C1_BUSSTAT.BS = 1 (bus busy). Also, after address being send, I2C1_BUSSTAT.BS = 1 (bus busy) but I2C1_BUSSTAT.RnW = 0 (device is transmitting - although it should equal to "1" as it Slave and is being addressed).

Is there anything that might have to be reconfigured otherwise or not configured here but should be? Should additional steps be taken at Slave side during Master write sequence?

Hello!

I have my Arduino Uno set up  to two BLDC_SHIELD_TLE9879s and have my motors with encoders connected to it. I'm trying to figure out a way to keep track of the position of the motors as they work together on a x and y axis. Is there a way to keep track of the position through the hall sensors? Or maybe a different way?

Please ask if you need more information and thanks for helping!

Hey Sir,

MCU CY8C6347BZI-BLD54 is used as a CPU on our product and it has been produced for 50K-100K units. However, there are a few units (less than 1%) having boot-up issue after executing the process of secure boot. The failure symptoms are listed below:

1. Power up for several cycles and then finally it could boot up successfully. The cycle time of powering up can't be calculated. It's a random.

2.  Always fail to boot up so it becomes a brick.

3.  1 unit succeeds to boot up intermittently.

The eFuse of these units is burned successfully if we check the eFuse bit after the unit succeed to boot up. Thus, we can't read any debug information from the SWD port. Then some signal waveforms are captured and compared on both the situation of successful and fail boot-up. The main differences are

1. The power rail behavior of MCU_VIND2, MCU_VRF, and MCU_VBUCK1

2. The activated timing of SWDIO

Please refer to the attachment for more detail waveforms. We suspect this issue results from the process of eFuse burning but we don't have solid evidence to prove it. Thus, we need your thoughts and insights on this issue. It's getting more critical now due to the increasing production volume. Thanks.