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The NOR Flash Memory forum discusses critical safety features for automotive and industrial systems, and Semper NOR Flash Memory with ASIL-B compliant and ASIL-D-ready.
The HyperFlash NOR Flash memories Forum offers discussions on automotive advanced driver assistance systems (ADAS), automotive instrument cluster, automotive infotainment systems, and communication equipment.
HyperRAM™ memory Forum discusses self-refresh DRAM operating on the 12-pin HyperBus interface. With a read throughput up to 333 MB/s, the HyperRAM for SoCs with limited on-board RAM providing external scratch-pad memory for fast read and write operations.
Non-volatile RAM forum discusses Technology such as F-RAM and nvSRAM, which combine non-volatile data storage up to 16Mbit density with the high performance of RAM. These low-power memories offer high endurance, high data retention and instant non-volatility without external battery back-up, enabling system reliability and cost reduction.
Discussion forum for Specialty Memory topics.
Discussion forum for SRAM related topics.
I have one doubt regarding S25FL256SAGMFI013 NOR Flash. I am interfacing this with Virtex 7 FPGA. Let me know the supply voltage of SCK pin if I am tie VIO pin to 1.8V?Show Less
Current Infineon website have something wrong of CY15E064J-SXE data.
The link datasheet download is CY15E064J-SXA not CY15E064J-SXE.
And this parts support 5V, but parts sorting at 3.3V.
So, please help provide CY15E064J-SXE datasheet for reference.
NOR Flash S29JL032J70TFI01 we are trying to incorporate in our design. We have been looking for Sector Protect and Unprotect support within device through In-System programming. Datasheet for the same mentions RESET# pin need 12V during protect/unprotect operation. We are not able to find additional information on it. From Datasheet Specs looks like we need VID voltage of around 12V in Hardware. Need to know what Hardware logic to get implement to achieve this. If you can share some reference Hardware implementation logic on this
I am working in the railway market. We have a very old safety product that is equipped with 28F010 type NOR flash memories. We would like to resurrect this board for a customer but since the board is safety we are trying to avoid a respin (if possible).
The part was in PLCC-32 package (soldered) : SPANSION/AMD/CYPRESS AM28F010-90JI (obsoleted in december 2005)
28F series NOR flash components were 5V-supplied but also required an additional 12V supply on VPP pin.
My understanding is that the 29F series are direct remplacement solutions (often pin-to-pin compatible) where the VPP pin is N.C. since those chips will work with 5V only. Am I right?
Yet I am wondering if it is really that simple. I was expecting to find a migration guide along with the PDN of this component. But not only the PDN won't suggest a direct replacement part but also the topic seems so complicated that the recommendation is to reach for the local representative of the brand :
AMD is obsoleting the Am28F010A, Am28F010, Am28F020A and Am28F020. Limited Fab capacity
and the continual migration of our customers to 5Volt and 3Volt Flash have necessitated the
obsolescence of these devices. Please contact your sales representative for information regarding the migration
from 12V to 5V or 3V devices.
Is there an official migration guide for these old products?
Otherwise is there other know differences between 28F and 29F products aside from the VPP pin ?
I guess that 20 years ago this was a basic knowledge in the EE world. But today I am struggling to find a good article on this topic.Show Less
Please let me know the Month/Year of the date code '136BB242'.
Part number: S29GL128P90FFIR10
Rot number: GU43980000
Ayuko IshizakiShow Less
I'm doing a solder joint reliability study on this component S25FL128SAGNFI003. Do you have the CTE value of the molding compound?
DSP is testing to write up to 1MB of data with S25FL128L memory through SPI communication.
I wrote 16byte data in memory and checked R/W up to 1 block (64KB) (SPI Baudrate : 30Mhz)
The problem occurs when 1 block (End Address: 0x0ff) is written and the next 2 Blocks (Start Address: 0x1000) is written.
1. Data is not written normally in 2 Blocks.
2. Writing data in 2 Blocks changes the data in 1 Block.
please share your knowledge