Memories Forum Discussions
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Nor Flash
The NOR Flash Memory forum discusses critical safety features for automotive and industrial systems, and Semper NOR Flash Memory with ASIL-B compliant and ASIL-D-ready.
Hyper Flash
The HyperFlash NOR Flash memories Forum offers discussions on automotive advanced driver assistance systems (ADAS), automotive instrument cluster, automotive infotainment systems, and communication equipment.
Hyper RAM
HyperRAM™ memory Forum discusses self-refresh DRAM operating on the 12-pin HyperBus interface. With a read throughput up to 333 MB/s, the HyperRAM for SoCs with limited on-board RAM providing external scratch-pad memory for fast read and write operations.
Non Volatile RAM (F-RAM & NVSRAM)
Non-volatile RAM forum discusses Technology such as F-RAM and nvSRAM, which combine non-volatile data storage up to 16Mbit density with the high performance of RAM. These low-power memories offer high endurance, high data retention and instant non-volatility without external battery back-up, enabling system reliability and cost reduction.
Featured Discussions
1. The timing diagram show a referesh collision during a write cycle. RWDS changes mid command. Is this expected behavior or a simulation bug? Where is the ideal point to sample RWDS for extended latency? It is not clear in the datasheet.
2. In past posts, my questions resulted in updates to the verilog model with respect to refresh collisions. I recently downloaded the most recent model, labelled 4.0, and find that it is not the most recent model I was personally given by infineon on this forum.
Show Lesssmartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/Nor-Flash/uboot-%E4%B8%ADS25FL512S-%E5%86%99%E4%BF%9D%E6%8A%A4%E6%97%A0%E6%B3%95%E6%B8%85%E9%99%A4%E9%97%AE%E9%A2%98/td-p/659097
Show LessWhen the power was turned on, "INVALID PARAMETER" was issued, and the parameters that should have been written at the time of shipping inspection were lost.
Repeated power on/off did not restore symptoms.
For confirmation, write down the parameters and analog adjustment values at the time of shipping inspection, and confirm that they can be written normally.
When the power was turned off and ON once at that time, "INVALID PARAMETER" was issued again, and it was confirmed that all adjustment values were off.
。 When I replaced it with a new board and turned the power off and ON again, it was confirmed that the adjustment value did not disappear and started up normally.
Writing is performed from the microcontroller via an external bus. Please tell us if you think there are any factors in the above symptoms.
Please let us know if there are any possible causes or countermeasures that cause data written by power ON / OFF to disappear as described above.
Show LessI think this is a custom item, but I'd like to know about the data sheet and alternatives.
I assume this is a custom product, but could you please tell me about the data sheet and alternatives?
Is it possible to use the SG29GL01GS part with 1.8V logic? Is a specific part number extension required?
i am getting error in address.
it is not reading address in correct address format.
my base address is 60000000+555, but it reading as 0000554 and 0000556.
Show LessHello,
I am using S25FL064L NAND with c6748 TI processor. I have connected
CS to CS_c6748
SO to MISO
WP not connected
VSS to ground
VCC to 3.3V
Reset not connected
SCK to SCK
SI to MOSI
I wanted to communicate to IC. I send 9f RDID command to IC. Attached is the pics. I have channel
1-SI
2-SCLK
3-CS
in the figures. I am continously sending these. But my SO remains at ground level. Why does this happen? At least it should keep first 8 bytes on SO line if I get it corerect. Please make suggestion,why this does not work.
Thanks in advance
With Regards
Shalini
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Hello,
Can this memory be ordered as lot sorted for the standby current? Can you provide the manufacturing distribution for the standby current?
Show LessHello,
I am using S25FS512SAGNFI011 Nor Flash for the FPGA Arria 10 configuration. I generated .jic file from .sof file as described in the document AN229767 of Infineon. I get the successful result on the tool when I load the file to the flash, but the FPGA does not boot up after power cycle.
My settings for the generating the file are below:
I'll be glad if you can help me.
Best regards!
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While attempting to flash data onto the memory, we have encountered persistent problems with memory corruption and functionality. Specifically, we have observed that errors are consistently popping up within the address range of 0x00000000 to 0x00002800.
Also, while erasing memory errors are popping up in given images
We've tried troubleshooting but need urgent assistance to resolve this issue.
Thanks & Regards
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