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The NOR Flash Memory forum discusses critical safety features for automotive and industrial systems, and Semper NOR Flash Memory with ASIL-B compliant and ASIL-D-ready.
The HyperFlash NOR Flash memories Forum offers discussions on automotive advanced driver assistance systems (ADAS), automotive instrument cluster, automotive infotainment systems, and communication equipment.
HyperRAM™ memory Forum discusses self-refresh DRAM operating on the 12-pin HyperBus interface. With a read throughput up to 333 MB/s, the HyperRAM for SoCs with limited on-board RAM providing external scratch-pad memory for fast read and write operations.
Non-volatile RAM forum discusses Technology such as F-RAM and nvSRAM, which combine non-volatile data storage up to 16Mbit density with the high performance of RAM. These low-power memories offer high endurance, high data retention and instant non-volatility without external battery back-up, enabling system reliability and cost reduction.
Discussion forum for Specialty Memory topics.
Discussion forum for SRAM related topics.
S29PL032J70BFI120 and S29PL032J70BFI070
What is the difference between these two products?
Are there any differences between them?
(5) production site (6) others
Can this memory be ordered as lot sorted for the standby current? Can you provide the manufacturing distribution for the standby current?Show Less
I am looking for a software which writes data to FRAM (FM25V20A-G) from PC. Can FLASH USB Programmer New 8FX work for FRAM also? If it doesn't, is there any software I can use?
Thank youShow Less
We use a S29GL01GT12DHVV10 for FPGA configuration memory. I am currently working on stress analysis and couldn't find any information in the datasheet for current of VIO pins. I believe all the max current consumption values on sheet 3 are for VCC. Looking for both a worst case/max and typical draw.
PSCK/tCH/tCL are available as AC specifications for SCK duty ratio, and for tCH/tCL, Notes 30,
Notes 30. ±10% duty cycle is supported for frequencies ≦ 50MHz.
(Confirm AC specs regarding SCK duty ratio: tCH/tCL)
When using SCK frequency: 333 kHz (PSCK: 3000 ns [cycle]), which of the following AC specification values for tCH/tCL is supported by Note 30?
Which of the following is the AC spec value?
When FSCK > 50MHz, the value is 45% (=50%-5%)xPSCK.
tCH(Min) = (50%-10%)xPSCK : (40%)1200ns
tCL(Min) = (50%-10%)xPSCK : (40%)1200ns
Or does it mean that up to ±10% duty cycle is possible?
tCH(Min) = 10%xPSCK : (10%)300ns
tCL(Min) = 10%xPSCK : (10%)300ns
I want to find a drop-in replacement for FM25L04B because it has errata in writing procedure, I changed it to FM25CL64B but it does not work. any advice?
Please let me know processing across the boundary between Die1 and Die2 of S25HL02GT,
For example, when program 32 bytes from 07FFFFF0h, is one transaction acceptable?
Or do I have to split it into two transactions?
I am using SPI Serial Flash Memory, 512Mbit, SO16 package in one of my design. I am finding many chips getting faulty in 5 to 6 months of operation in field as all access fail post that.
On analyzing one of the field return card. I am able to read device ID of this part but starting few sectors read/ write is not consistent and finding number of places data read not matching with data written.
We tried to reprogram multiple times but data integrity is not there in various sectors belong to first bank.
Device ID is getting detected by firmware always. Just printing one uboot print of processor log.
Detected S25FL512S_256K with page size 512 Bytes, erase size 256 KiB, total 64 MiB
Since data is not consistent in various sectors and we are using this as processor boot memory, so processor gets stuck during bootup.
We are using mostly first bank (16MB) location only for processor uboot. On faulty chip, we found read/write access to locations 4MB onwards (all 3 banks except first) is ok. Since it is processor boot memory, so would be read just once during processor boot and write only if any image upgrade needed which is rare.
Datasheet mentions 100,000 Program-Erase Cycles on any sector typical. These sites are not having power backup and almost gets power cycle on daily basis but it does not explain endurance of sectors.
We noticed that part S25FL512SAGMFIR11 used is with VIO option but this pin is kept NC in our design. Measured voltage at this pin is 3.3V but dips to 2.5V while doing any access in working chips too. Below is the measurement done in one of the working board.
Host is operating at 3.3V IO level which is the same supply of flash VCC.