Memories

Since AMD Flash memory spun off to Spansion and then to Cypress who is part of Infineon I am coming here with a question about how production locations stamped their country on AMD Flash Memory parts in the late 1980s. We received AMD AM9016DL/BFC parts which were supplied by Arrow Electronics back in 1986. Being Arrow only supplies parts received directly from OEMs I expect that the parts are authentic AMD parts. The marking on the bottom of each part is MALAYSIA. This marking located on the bottom is stamped in white ink and is in a slightly different position on each part. Looks like they may be hand stamped, possibly after testing or something. Was this normal for parts produced in 1980s?

Hello Everyone:

      We are not able to set 'WEL' bit in Status Register 1, or even read back what is written in Memory. We are using a FPGA to interface with Serial Flash S25FL256S... . Below is the sequence of operations.

• Power up
• Wait for Tpu of 300us
• Read JEDC ID (Instruction 0x1F). Correct data is read back.
• Issue WREN (Instruction 0x6)
• Issue Erase Flash Array (Instruction 0x20, address bits[23:0] = 0x0)
• Wait for 11 seconds
• Issue Status register read (RDSR Instruction 0x05), reads back 0x0. Expect WEL (bit 1 to be set since WREN was issued).
• Issue Page Program (PP, Instruction 0x2, address[23:0] = 0x0, 4 Bytes of data).
• Wait for 2 ms (for page program to complete).
• Read Status 1 register, reads back 0x0.
• Read Flash Array (Instruction, 0xB, address [23:0] = 0x0, ), reads back 0xFF all bytes. So data could not be stored.

    I am attaching some waveforms showing the operations.  The file names of waveforms indicate the type of operation being performed. These waveforms are from Xilinx Vivado ILA. The signal names are mapped as below.

SCK:                      jb_cp_mem_clk_OBUF

CS#:                      cp_pMem_csN_OBUF

IO[3:0]:                cp_mem_in_OBUF[3:0]

Below is some information about the operations shown in the waveforms.

1) Read JED ID & Issue WREN.jpg:    This file shows that reading of JEDEC ID is working. After reading the ID, we are issuing 'WREN' Instruction to set the 'WEL' bit.

2) Erase Flash Array (P4E).jpg:     Before writing we are erasing the sector at address 0x0.

3) Read Status register 1, RDSR1 .jpg:    Reading Status Register 1, read back data is 0x0.

4) Page Program & Read Status Register.jpg:   Write data to memory and read Status Register 1, read back data is still 0x0, WIP bit not set.

5) Read Status Register & Read Flash Array.jpg:  Read status register and read data from memory. Status register is still 0x0 and data read from memory is all 0xFF. Four bytes were written and four bytes read back.

     Did we miss anything from the datasheet? Are we doing something incorrectly? Please help!

Thank you so much.

Best regards,

Hello,
I am trying to write bit 3 of configuration register 3 in a S25HL250T device.  I see in the data sheet that the bit is only writeable in the nonvolatille memory space address 0x000004. 
My sequence is as follows:
read config 3 using a polling transfer routine // read data = 0x04... I was expecting 0x00 based on the data sheet??
data |=  0x08; //set bit 3 of the write data
WRENB_0_0;// write the write enable bit command 0x06

uint8_t command_buff[5] __attribute__ ((aligned (4)));

command_buff[0] = CYPRESS_WRITE_ANY_REG; //0x71
command_buff[1] = 0x00;
command_buff[2] = 0x00;
command_buff[3] = 0x04;
command_buff[4] = new_reg_data;

MSS_QSPI_polled_transfer_block(3, command_buff, 1, (uint8_t*)0, 0,0); 
//Polled transfer variables =(#address bytes, command, # of bytes after command, read buf, #of read bytes, # of idle cycles)

The write seems to work fine, but the register does not get written.
Any help would be appreciated.

Thanks,

Byron

Hello everybody!

Recently I was doing some hacky/fancy tests of flash chip behavior between different manufacturers when it is used not *exactly* how it was intended 😉 I was changing configuration of external memory controller in my MCU to drive WE# line low or high during reading operation (used for example for chips with byte lane selection etc.) and I've encountered something strange which I couldn't find in the S29AL016J datasheet.

In other flash chip manufacturers (pin-to-pin comp. + same timings and control) when I try to perform read operation ("uint16_t test = *(uint16_t*)(FLASH_BASE);") everything works correctly, i.e. data is exposed on data lines if WE# line is driven high, and data lines are kept low if WE# line is driven low.

In S29AL016J it doesn't matter if MCU drives WE# line low or high during reading, chip drives data lines anyway!

It looks like some flash chip's internal state machine checks if address set on address lines is "special" one (0x555 etc.) and if not, it executes read operation and exposes data on data lines.

Could anybody confirm it?

Some snippet code looks like that:

//set EMC to drive WE# line low during reading

//EMC_cfg_we(FALSE);


//set EMC to drive WE# line high during reading

EMC_cfg_we(TRUE);


while(1)

{

   uint8_t test = ( *( Uint16 * )(0x80000000L)) & 0xFF;

   uart_putc(test);

   delay_ms(500);

}

I have few identical PCBs with same MCU, only flash chip is different.

I would really appreciate for any explanation!

BR

Adam

Hi,

I would like to know the Junction- Case Thermal Resistance and Max Junction Temperature for S25FL256SAGMFI001.

Thanks,

Prathik

HI,

I am using CY15B064Q-SXE IC as it suits my requirement.

In the product spec it was written that minimum operating temperature is -40 deg.

But in datasheet it is mentioned that, the operating temperature range when powered up is (-50 deg).

Which temperature should i consider.

What is the difference between them.

Thanks & Regards

Naresh