Memories Forum Discussions

Hi,

Now I use S25HS512T flash chip in our project, and need SDK for the chip of your product.

I have submitted download request, but that request has not been progressed. So I hope you can deal it early!

Thank you!

Hello, I want to use the S29GL512T through SM32F7 and I can't program/erase. In prior’s designs, the board had the memory S29GL128N and now I want to use the new S29GL512T without change the board design.

Thus, the first question is, can I issue the S29GL512T as 128Mbits memory keeping the A23 and A24 pins to no connect? Or is there any other inconvenient?

Then if there is no problem to use S29GL512T, I’ve developing an external loader to program the memory and, as I said, the program/erase doesn't work. I'm not sure what happens, but I suspect the sequence isn't sent successfully because the RD/BY# pin never detects the falling edge. Can you help me and suggest things to check for the program/erase process works?

This is the code for MassErase

int MassErase(void) {
	uint8_t mass_erase = 0;
	unsigned long polling_counter = 0xFFFFFFFF;
	volatile uint16_t status_reg;

	NOR_WRITE(NOR_ADDR_SHIFT(BSP_NOR_BASE_ADDR, NOR_MEMORY_16B, 0x555), 0xAA);
	NOR_WRITE(NOR_ADDR_SHIFT(BSP_NOR_BASE_ADDR, NOR_MEMORY_16B, 0x2AA), 0x55);
	NOR_WRITE(NOR_ADDR_SHIFT(BSP_NOR_BASE_ADDR, NOR_MEMORY_16B, 0x555), 0x80);
	NOR_WRITE(NOR_ADDR_SHIFT(BSP_NOR_BASE_ADDR, NOR_MEMORY_16B, 0x555), 0xAA);
	NOR_WRITE(NOR_ADDR_SHIFT(BSP_NOR_BASE_ADDR, NOR_MEMORY_16B, 0x2AA), 0x55);
	NOR_WRITE(NOR_ADDR_SHIFT(BSP_NOR_BASE_ADDR, NOR_MEMORY_16B, 0x555), 0x10);

	do {
		polling_counter--;
		NOR_WRITE(NOR_ADDR_SHIFT(BSP_NOR_BASE_ADDR, NOR_MEMORY_16B, 0x555), 0x70);
		status_reg = *(__IO uint32_t *)(uint32_t)BSP_NOR_BASE_ADDR;
		if( (status_reg & 0x80) == 0x80  )  /* Are all devices done bit 7 is 1 */
			break;
	}while(polling_counter);

#if DEBUG
	if ((status_reg & 0x20) == 0x20) {
		PRINT_TEXT("Mass erase error");
		mass_erase = 0;
	} else {
		PRINT_TEXT("Mass erase done!");
		mass_erase = 1;
	}
#endif

	return mass_erase;
}

We are planning to use Erase Suspend and Resume operations for S29GL032N NOR Flash in our product.

We want to know how much time Erase Suspend command execution will take (min and max values).

This time is not given in the datasheet.

Regards,

Anil Patil

Has the FM25V02A or similar FRAM device been tested for EMI environments like RS103 up to or beyond levels of 20,000 V/m?

We are experiencing issues where even though the system is configured to not write to the device, the first few addresses (0,1,2,3) are changing value when exposed to a radiated field at high levels.

We are planning to use Erase Suspend and Resume operations during Sector Erase in S29GL032N NOR Flash.
We want to know if there is data available for how much one Erase Suspend and Resume operation will impact on the Sector Erase time (min and max).

Also want to know the device Reliability due to frequent Suspend/Resume operations during Sector Erase.

Regards,

Anil Patil

Hi, 

I patched the linux-5.4.40-cy-spimem.patch to TI provided SDK.

And I modified the device tree like below,

&main_spi0 {
pinctrl-names = "default";
pinctrl-0 = <&main_spi0_pins_default>;
ti,pindir-d0-out-d1-in = <1>;
nvram@0 {
compatible = "cy-spimem", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
#spi-cs-high;
#data-size = <16>;
};
};

But the spi speed is not 40Mhz as expected. Please help to point out how to set the spi speed in device tree for FRAM?

Best Regards

xixiguo