LIN over UART

Announcements

Webinar: Integrated solutions for smaller, simpler low-voltage motor control design.
Join the webinar to experience!

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
MaxMES
Level 1
Level 1
First solution authored First reply posted First like given
Hello, I'm trying to implement LIN communication over UART on a TLE989x. I have a LIN transceiver and am able to receive the first LIN packet sent by an external device correctly. However, after this packet, I'm no longer getting any End Of Sync or Break flags and hence cannot receive any more LIN frames. Do I need to set these flags manually in the software when I detect them or is the hardware supposed to do it for me ? Worth mentioning, that after a certain duration, I'm resetting my UART channel and theoretically, should be able to receive the new first LIN packet. But it is not the case, I need to reset my device. In the user guide, some steps a given to initialize the break/sync field detection logic, does these need doing only once ? Or for each received frame ? Many thanks for the help
0 Likes
1 Solution
MaxMES
Level 1
Level 1
First solution authored First reply posted First like given

Thanks for your reply @Raj_C , I have solved my issue by manually setting the break and sync flags when detecting them in the software via the registers LINSTS.BRKSET and ISS.EOFSYNSET. 

But what I found unclear is "Re-synchronization and setup of the baud-rate", is this referring to initialization of the break detection logic? Or simply, measuring and adapting the baudrate for each frame?

By initialization, I mean the following steps (chapter 9.9.4) :

"The LIN baud-rate detection feature provides the capability to detect the baud-rate within the LIN protocol
using Timer2. Initialization consists of:
• Setting of the serial port of the microcontroller to mode 1 (8-bit UART, variable baud-rate) for
communication
• Providing the baud-rate range via bit field LINCON.BGSEL
• Toggling of the LINCON.BREN bit (set the bit to 0 before set it back to 1) to initialize the sync break/synch
detection logic
• Clearing all status flags LINST.BRK, IS.EOFSYN and IS.ERRSYN to 0
• Setting of Timer2 to capture mode with falling edge trigger at pin T2EX. Setting of the bits
T2_MOD.EDGESEL to 0 by default and T2_CON.CP_RL2 to 1
• Enabling Timer2 external events. T2_CON. EXEN2 is set to 1. (EXF2 flag is set when a negative transition
occurs at pin T2EX)
• Configuring of fT2 by bit field T2_MOD.T2PRE"

Many thanks

Maxime

View solution in original post

0 Likes
2 Replies
Raj_C
Moderator
Moderator
Moderator
500 replies posted 50 likes received 250 replies posted

Hi @MaxMES,

As per the TLE989x UM:

" Re-synchronization and setup of the baud-rate has always to be done for every master request header or slave response header LIN frame by user software"

So please try to follow the above statement and let us know if this works.

Additionally, please refer to the sections 9.9.3, 9.9.4, 9.9.5, and 9.9.6 of the TLE989x UM.

 

Thank you

Best Regards

Raj Chaudhari

0 Likes
MaxMES
Level 1
Level 1
First solution authored First reply posted First like given

Thanks for your reply @Raj_C , I have solved my issue by manually setting the break and sync flags when detecting them in the software via the registers LINSTS.BRKSET and ISS.EOFSYNSET. 

But what I found unclear is "Re-synchronization and setup of the baud-rate", is this referring to initialization of the break detection logic? Or simply, measuring and adapting the baudrate for each frame?

By initialization, I mean the following steps (chapter 9.9.4) :

"The LIN baud-rate detection feature provides the capability to detect the baud-rate within the LIN protocol
using Timer2. Initialization consists of:
• Setting of the serial port of the microcontroller to mode 1 (8-bit UART, variable baud-rate) for
communication
• Providing the baud-rate range via bit field LINCON.BGSEL
• Toggling of the LINCON.BREN bit (set the bit to 0 before set it back to 1) to initialize the sync break/synch
detection logic
• Clearing all status flags LINST.BRK, IS.EOFSYN and IS.ERRSYN to 0
• Setting of Timer2 to capture mode with falling edge trigger at pin T2EX. Setting of the bits
T2_MOD.EDGESEL to 0 by default and T2_CON.CP_RL2 to 1
• Enabling Timer2 external events. T2_CON. EXEN2 is set to 1. (EXF2 flag is set when a negative transition
occurs at pin T2EX)
• Configuring of fT2 by bit field T2_MOD.T2PRE"

Many thanks

Maxime

0 Likes