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MOSFET (Si/SiC) Forum Discussions

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Hello,

I am reading the data sheet of IRS2113. And something come to my mind:
What is the definition of Allowable offset supply voltage
transient?

Thank you!
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It is the maximum rate at which the voltage at the VS pin can change is 50 V/ns. This high degree of tolerance makes the IC robust, and ensures excellent device performance in demanding applications such as motor drives, switching power supplies, etc. The dVS/dt capability is measured as per the test set up shown in Fig. 2 of the datasheet: https://www.infineon.com/dgdl/irs2110.pdf?fileId=5546d462533600a40153567660ff27b0

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It is the maximum rate at which the voltage at the VS pin can change is 50 V/ns. This high degree of tolerance makes the IC robust, and ensures excellent device performance in demanding applications such as motor drives, switching power supplies, etc. The dVS/dt capability is measured as per the test set up shown in Fig. 2 of the datasheet: https://www.infineon.com/dgdl/irs2110.pdf?fileId=5546d462533600a40153567660ff27b0
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