MOSFET (Si/SiC) Forum Discussions

Hello Team,
We are planning to use the MOSFET IPTG039N15NM5 for one of our applications.
We are using a Photovoltaic MOSFET Driver VOM1271T to drive the MOSFET.
Hence the gate to source voltage will be 8.4V.
Attached is the snippet from the schematic of the same.

Our requirements are.

• Maximum drain voltage = 48V (so the MOSFET shall have a VDS > 60V)
• Low RDSon =  as low as possible
• Gate Capacitance = as low as possible (since the output current of the VOM1271T is only 15uA, a high gate capacitance will result in high turn on time).
• Low OFF state capacitance =  The drain to source off state capacitance shall be very low else we will get high frequency signals at the output even if the MOSFET is OFF.
• Continuous Drain Current = >150A (The continuous drain current of the MOSFET is marked as 190A in the datasheet.)
  So can you please confirm whether a single MOSFET is enough to carry 150A of current.
  On our system, the 150A current may last for 5-10 Seconds.
  The continuous current will be 90A for all other time.
  What are the precautions we need to take for such a high current.
  Please confirm whether a single MOSFET is able to carry this much current?.
  
  Looking for your reply.

Hello,

IRFP044NPBF is discontinued, I found IRFP064NPBF, can I use it to replace the IRFP044NPBF ?

My project uses this mosfet as an electronic load for 20V, 3A, 60W max.

For MOSFET Loss calculation of inductive load, there are clear methods. But for resistive load, it is rare to see the calculation method.  How to calculate the switch time of MOSFET when the load is a resistor?

Hello

What will be the effect of Output capacitance Coss of Mosfet on EMI/EMC testing in DC-DC Converter.

Regards

Lucky Kumar

Hi Team,

I am using the part  BSS84PH6327XTSA2 with 5V compatible microcontroller. For one of our development project we are migrating to 3.3V operating microcontroller.It is given in the datasheet, that the maximum VGS threshold is -2V.

My microcontoller can source upto 8mA and VOH value will be 2.9V. Can anyone please confirm that the MOSFET can be used at the above specified condition.I am using the FET to drive the optocoupler.

Thanks & Regards

Mahalakshmi

Does the Rthjc listed in the data sheet refer to the thermal resistance for the top surface or the bottom surface (Drain part)?

I would like to know the thermal resistance values (Typ/Max) of both the top and bottom surfaces.

The device I am considering using is IAUC120N06S5L032 or IAUC60N04S6L039.

Best Regards,
Tetsuo

Hi Infineon team.

1. After testing, we found that all pins are in high resistance state to ground when pin VDD/V1/V2 are not powered up.

2. In the case of power-on test, the selected pin is found to be high resistance to ground, while the other twopins become low resistance to ground (short circuit).
For example, when V1/V2 is 1/0, RFin connects to RF1, RF1 has high resistance to ground, and RF2/RF3 have low resistance to ground, with a resistance value of about 4ohm.

Please help to confirm the following questions, thank you

1. Are the above test results correct?

2. If the above test results are correct, why should the 2pins that are not selected during power-up be shorted to ground, and for what reason? Is this the case for all RF switches, or is this the only device designed this way? In many analog switches, all pins are in a high resistance state to ground at power up, whether they are selected or not.

3. Is there any device with similar function that is still high resistance to ground even if the pin is not energized at power-up?

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Dear community,

I am trying to make sense of the information reported in the datasheet of the Si Mosfet IPP075N15N3 G, and the information reported in the 2006 Infineon App note MOSFET Power Losses Calculation Using the Data-Sheet Parameters, by Graovac, Pürschel  and Kiep, and I have a few questions.

(1) Regarding rise-time, fall-time and delay time reported in the mosfet datasheet, seem to refer to some test condition with RG = 1.6 Ohm. Is this the value of the external gate resistance applied to the MOSFET? or else?

(2) When trying to simulate via LT spice the switching loss, I used the circuit below, which I adapted from the diagram in the 2006 Infineon app note. (In LTSpice, the MOSFET was already present in the library after I installed it). In the circuit, I guessed the values of turn on gate resistance, and turn off gate resistance, but I am not sure these are ok. Should I just use one resistance in the gate with a value of RG = 1.6 Ohm? I am asking because the switching loss loss that I measure on LTspice on Mosfet M1 results about twice as big compared to the switching loss on M1 I calculated using the method described in the 2006 Infineon application note I stated above. Note that in the circuit below, I specified VDD = 75 V, VGS = 10V, ID = 100A like in the MOSFET datasheet .

(3) I am using a switching frequency of 1 MHz in the LT spice circuit reported, but I am not sure that this is correct either (perhaps too high? I am not sure what is the frequency value used when the MOSFET is tested in real life to measure rise and fall time).

Finally, my objective would be to use LT spice to confirm that the switching loss calculation I made according to the 2006 Infineon application note are correct, or at least in the right ball park. Once I confirm that, I would like to evaluate switching losses at different valued of ID and VDD, and create enough data so that I can input some energy loss tables in PLECS, representing as accurately as possible the loss behavior of IPP075N15N3 G .

Thank you so much for your help