TLE7181EM - Driving MOSFET output stages

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nsyed
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Hello,

I am looking at the datasheet of TLE7181EM, Rev 1.2 2019-03-14.

The Table 7, PWM/DIR interface normal operation does not makes sense
When DIR is se to 1 - All HighSide and Low-Side switches are turned OFF.

I believe there is a typo in this table and the DIR & DRVDIS table columns are swapped. Can anyone confirm if this is the correct ?
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Pablo_EG
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Hello Nadeem,

It was confirmed that the two columns are swapped and that it is a documentation mistake.
The new and corrected document is now in the process of being finalized.
Therefore, it will soon be published.

Thank you for catching this error.

Best regards,
Pablo

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Pablo_EG
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Hello Nadeem,

Thank you for posting on Infineon Forums.

I went through the table you referred to, and as you suggested, the DIR and DRVDIS columns seem to be swapped.
I will check internally about this and get back to you.
Once I have the confirmation, I will let you know.

Thank you for noticing this possible mistake.

Best regards,
Pablo
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nsyed
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Appreciate your help !!! Please let me know when you have an update.
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Pablo_EG
Moderator
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Moderator
First question asked 250 sign-ins 250 replies posted
Hello Nadeem,

It was confirmed that the two columns are swapped and that it is a documentation mistake.
The new and corrected document is now in the process of being finalized.
Therefore, it will soon be published.

Thank you for catching this error.

Best regards,
Pablo
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nsyed
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Pablo Elosegui Garcia wrote:
Hello Nadeem,

It was confirmed that the two columns are swapped and that it is a documentation mistake.
The new and corrected document is now in the process of being finalized.
Therefore, it will soon be published.

Thank you for catching this error.

Best regards,
Pablo


Thank you so much !! Appreciate your help !!!
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