SiC for PFC

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User13734
Level 1
Level 1
First reply posted First like received 5 questions asked

Hello,

We are trying to improve efficiency of PFC stage at high line input voltage (230Vac) and 20% of nominal load (107W) to meet 80 Plus Gold standard. Currently we are using Infineon MOSFET IPB60R099P7 in our interleaved Boundary conducting Mode PFC (Controller-FAN9611). For this topology at lite load and high input voltage the switching frequency sweep is  220kHz to 470kHz during input line cycle. We hoped that replacing common MOSFET with SiC (Infineon IMBG65R107M1H) will improve efficiency. The datasheet for IMBG65R107M1H says that it is compatible with standard drivers. We simulated this circuit with Infineon Spice models and it shows that power losses should be 1W less if using SiC IMBG65R107M1H. But in the real hardware SiC MOSFET has much higher losses than common MOSFET. Could you, please, help as to solve this problem.

Regards,

Lev

 

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1 Solution
cynic_bandera
Employee
Employee
5 questions asked First question asked 100 sign-ins

SiC approach is not a right way in your case. Using GaN is the right! You can drastically reduce Eoff losses (5- 10 times), since Miller capacitance is 50 times smaller! You can reduce Eon losses by 30%. Since our GaNs are current driven and have an integrated clamp, you can use a simple R +RC circuit (you can find it on the website) to drive it from every controller.

Your controller has a phase management, you can program the level when the second channel switched off.  This feature will help you to achieve high efficiency at low power.

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2 Replies
Dipti_Kiran
Moderator
Moderator
Moderator
250 sign-ins 10 likes received 50 replies posted

Hello Lev,

It could also be because of layout parasitics. Could you please share the measurement data, files and waveform from the hardware and simulation? Vds,Vgs,Id, and so on. 

Which simulation tool did you use, and which  MOSFET model did you use in simulation (L0 or L3)?Are you redoing the layout for SiC or just replacing Si with SiC? How are you estimating the power loss in SiC?

Regards,

Dipti

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cynic_bandera
Employee
Employee
5 questions asked First question asked 100 sign-ins

SiC approach is not a right way in your case. Using GaN is the right! You can drastically reduce Eoff losses (5- 10 times), since Miller capacitance is 50 times smaller! You can reduce Eon losses by 30%. Since our GaNs are current driven and have an integrated clamp, you can use a simple R +RC circuit (you can find it on the website) to drive it from every controller.

Your controller has a phase management, you can program the level when the second channel switched off.  This feature will help you to achieve high efficiency at low power.

0 Likes