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1. What are the factors affecting the turn-off delay of a power MOS?

2. Is there a quantitative expression for the off-time delay of a power MOS in addition to the simulation modeling, and the delay size and its influencing factors?

smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/MOSFET-Si-SiC/%E5%8A%9F%E7%8E%87MOS%E5%85%B3%E6%96%AD%E5%BB%B6%E6%97%B6%E9%97%AE%E9%A2%98/td-p/691543

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Hi @mangopoweer.

Thank you for your interest in Infineon products.

The turn-off delay of power MOSFETs is greatly affected by the impedance of the signal source of the measurement circuit and the load on the drain/source, therefore, the specification basically provides the conditions of the test method and the test circuit. Taking IPB60R099P7 as an example, the following figure shows the relevant test circuit and its main parameters.

Neo_Qin_0-1707445961359.png

Please note that when using MOSFETs to cut different kinds of loads (inductive/capacitive/resistive), the switching transition times can be significantly different. There has been a lot of literature discussing these complex dynamic switching transition processes in detail and I have attached the following Infineon application note for reference.

MOSFET Power Losses Calculation Using the Data-Sheet Parameters

BR,

Neo

smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/MOSFET-Si-SiC/%E5%8A%9F%E7%8E%87MOS%E5%85%B3%E6%96%AD%E5%BB%B6%E6%97%B6%E9%97%AE%E9%A2%98/m-p/691981

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Community Manager
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Hi @mangopoweer.

Thank you for your interest in Infineon products.

The turn-off delay of power MOSFETs is greatly affected by the impedance of the signal source of the measurement circuit and the load on the drain/source, therefore, the specification basically provides the conditions of the test method and the test circuit. Taking IPB60R099P7 as an example, the following figure shows the relevant test circuit and its main parameters.

Neo_Qin_0-1707445961359.png

Please note that when using MOSFETs to cut different kinds of loads (inductive/capacitive/resistive), the switching transition times can be significantly different. There has been a lot of literature discussing these complex dynamic switching transition processes in detail and I have attached the following Infineon application note for reference.

MOSFET Power Losses Calculation Using the Data-Sheet Parameters

BR,

Neo

smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/MOSFET-Si-SiC/%E5%8A%9F%E7%8E%87MOS%E5%85%B3%E6%96%AD%E5%BB%B6%E6%97%B6%E9%97%AE%E9%A2%98/m-p/691981

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