Aug 21, 2019
12:27 AM
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Aug 21, 2019
12:27 AM
Guys, anyone knows how to eliminate oscillation and what causes oscillation during SiC switching?
Solved! Go to Solution.
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- IFX
1 Solution
Aug 21, 2019
02:14 AM
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Aug 21, 2019
02:14 AM
SiC MOS is a fast switching and sensitive component . High dv/dt, di/dt work together with the stray parameter will introduce the oscillation .
How to eliminate oscillation is the state of art , we can increase the gate resistor to decrease the dv/dt , di/dt in a proper value.
We can also minimize the gate Inductance loop to keep a small stray inductor , reduce the stray capacitor between the PCB layers…
IFX have several SiC evaluation boards, if necessary , you can also refer to the part of the design
https://www.infineon.com/cms/en/product/power/wide-band-gap-semiconductors-sic-gan/silicon-carbide-s...
How to eliminate oscillation is the state of art , we can increase the gate resistor to decrease the dv/dt , di/dt in a proper value.
We can also minimize the gate Inductance loop to keep a small stray inductor , reduce the stray capacitor between the PCB layers…
IFX have several SiC evaluation boards, if necessary , you can also refer to the part of the design
https://www.infineon.com/cms/en/product/power/wide-band-gap-semiconductors-sic-gan/silicon-carbide-s...
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Aug 21, 2019
02:14 AM
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Aug 21, 2019
02:14 AM
SiC MOS is a fast switching and sensitive component . High dv/dt, di/dt work together with the stray parameter will introduce the oscillation .
How to eliminate oscillation is the state of art , we can increase the gate resistor to decrease the dv/dt , di/dt in a proper value.
We can also minimize the gate Inductance loop to keep a small stray inductor , reduce the stray capacitor between the PCB layers…
IFX have several SiC evaluation boards, if necessary , you can also refer to the part of the design
https://www.infineon.com/cms/en/product/power/wide-band-gap-semiconductors-sic-gan/silicon-carbide-s...
How to eliminate oscillation is the state of art , we can increase the gate resistor to decrease the dv/dt , di/dt in a proper value.
We can also minimize the gate Inductance loop to keep a small stray inductor , reduce the stray capacitor between the PCB layers…
IFX have several SiC evaluation boards, if necessary , you can also refer to the part of the design
https://www.infineon.com/cms/en/product/power/wide-band-gap-semiconductors-sic-gan/silicon-carbide-s...