About the IAUC120N06S5N017 thermal design issues

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yjc0101
Level 1
Level 1
5 replies posted 5 questions asked 10 sign-ins

ALL Hi.

As shown in the figure below, when I use IAUC120N06S5N017 for circuit design. If the material of the PCB used is RF4, four-layer board 2S2P, copper foil is 2OZ thickness, PCB top layer and bottom layer to increase the over-hole connection between. The back of the board to increase the heat dissipation silicone pad and heat sink. RthPCB to be how to estimate the value?

yjc0101_0-1688548095756.png

The parameters shown in the figure below are the data sheet of the device on a four-layer 2s2p FR4 PCB as defined by the JEDEC standard (JESD51-5-7). the thermal resistance of the PCB when vertical in still air is 23.3 K/W. what is the thermal resistance if a thermally conductive silicone pad and heat sink are added?

yjc0101_0-1688548873212.png

yjc0101_1-1688548886345.png

 

 

 

Thank you.
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1 Reply
Abhilash_P
Moderator
Moderator
Moderator
50 likes received 500 replies posted 250 solutions authored

Hi,

  Thank you for posting on the Infineon Community. 

Similar issue has been answered in the following thread. Please refer the same,

https://community.infineon.com/t5/MOSFET-Si-SiC/How-is-the-junction-temperature-calculated-for-IAUS3...

 

Regards,
Abhilash P

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